WAFER TEST LIMITS1 Parameter AD768ACHIPS Limit Units Integral Nonlinearity 2 ±8 LSB ma" />
參數(shù)資料
型號(hào): AD768ARZ
廠商: Analog Devices Inc
文件頁數(shù): 15/20頁
文件大?。?/td> 0K
描述: IC DAC 16BIT 30MSPS 28-SOIC
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 1
設(shè)置時(shí)間: 25ns
位數(shù): 16
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 雙 ±
功率耗散(最大): 600mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 28-SOIC W
包裝: 管件
輸出數(shù)目和類型: 2 電流,單極;2 電流,雙極
采樣率(每秒): 40M
產(chǎn)品目錄頁面: 781 (CN2011-ZH PDF)
REV. B
–4–
AD768
WAFER TEST LIMITS1
Parameter
AD768ACHIPS Limit
Units
Integral Nonlinearity
2
±8
LSB max
Differential Nonlinearity
2
±6
LSB max
Offset Error
±0.2
% FSR max
Gain Error
±1.0
% FSR max
Reference Voltage
±1.0
% of nom. 2.5 V max
Positive Supply Current
40
mA max
Negative Supply Current
73
mA max
Power Dissipation
600
mW max
NOTES
1Electrical test are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal
yield loss, yield after packaging is not guaranteed for standard product dice.
2Limits extrapolated from testing of individual bit errors.
3Die offers latch control pad. Edge triggered latches become level triggered when latch control and clock pads are high.
4Die substrate is connected to V
EE.
PIN DESCRIPTIONS
Pin No.
Symbol
Type
Name and Function
1
IOUTA
AO
DAC Current Output. Full-scale current when all data bits are 1s.
2
NR
AI
Noise Reduction Node. Add capacitor for noise reduction.
3
REFOUT
AO
Reference Output Voltage. Nominal value is 2.5 V.
4
NC
No Connect. Reserved for internal use.
5
REFCOM
P
Reference Ground.
6
IREFIN
AI
Reference Input Current. Nominal is 5 mA. DAC full-scale is 4
× this current.
7
DB0
DI
Data Bit 0 (LSB).
8–14
DB1–DB7
DI
Data Bits 1–7.
15
DCOM
P
Digital Ground.
16
CLOCK
DI
Clock Input. Data latched on positive edge of clock.
17–23
DB8–DB14
DI
Data Bits 8–14.
24
DB15
DI
Data Bit 15 (MSB).
25
VDD
P
Positive Supply Voltage. Nominal is +5 V.
26
VEE
P
Negative Supply Voltage. Nominal is –5 V.
27
IOUTB
AO
Complementary DAC Current Output. Full-scale current when all data bits are 0s.
28
LADCOM
P
DAC Ladder Common.
Type: AI = Analog Input; DI = Digital Input; AO = Analog Output; P = Power.
(TA = +25 C, VDD = +5.0 V, VEE = –5.0 V, IREFIN = 5 mA, unless otherwise noted)
VDD VDD
DB15
DB14 DB13
DB12 DB11
DB10
REFCOM IREFIN
DB0
DB1
DB2
DB3 DB4
VEE
IOUTB
LADCOM
IOUTA
NR
REFOUT
NC
DB9
DB8
CLOCK
LATCH CONTROL
DCOM
DB7
DB6
DB5
Die Size:
0.1106
× 0.1417 inch, 15,672 sq. mils
(2.81
× 3.60 mm, 10.116 sq. mm)
DICE CHARACTERISTICS
3, 4
PIN CONFIGURATION
14
13
12
11
17
16
15
20
19
18
10
9
8
1
2
3
4
7
6
5
TOP VIEW
(Not to Scale)
28
27
26
25
24
23
22
21
AD768
NC = NO CONNECT
IOUTA
VDD (+5V)
VEE (–5V)
IOUTB
LADCOM
NR
REFOUT
NC
DB13
DB14
DB15 (MSB)
REFCOM
IREFIN
(LSB) DB0
DB1
DB2
DB3
DB10
DB11
DB12
DB4
DB5
DB6
DB7
DB9
DCOM
CLOCK
DB8
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