參數(shù)資料
型號(hào): AD768ACHIPS
廠商: ANALOG DEVICES INC
元件分類: DAC
英文描述: 16-Bit, 30 MSPS D/A Converter
中文描述: PARALLEL, WORD INPUT LOADING, 25 us SETTLING TIME, 16-BIT DAC, UUC31
封裝: 2.81 X 3.60 MM, DIE-31
文件頁數(shù): 7/20頁
文件大?。?/td> 334K
代理商: AD768ACHIPS
AD768
REV. B
–7–
RE FE RE NCE OUT PUT
T he internal 2.5 V bandgap reference is provided for generation
of the I
REFIN
current, and must be compensated externally with
a capacitor of 0.1
μ
F or greater from REFOUT to REFCOM. If
an external reference is used, REFOUT should be tied directly
to the positive supply voltage, V
DD
. T his effectively turns off the
internal reference, eliminating the need for the external capaci-
tor at REFOUT . T he reference is specified to drive a nominal
load of 5 mA with a maximum of 15 mA. Operation with a
heavier load will result in degradation of supply rejection and
reference voltage accuracy. T herefore, the reference output
should be buffered with an amplifier when additional load cur-
rent is required. A properly sized pull-up resistor can also be
used to source additional current to the load. T he resistors value
should be selected such that REFOUT will always source a
minimum of 5 mA to IREFIN and the additional load.
AD768
IREFIN
REFOUT
REFCOM
C
REFCOMP
500
5
3
6
Figure 6. Typical Reference Hookup
T E MPE RAT URE CONSIDE RAT IONS
Note that the reference plays a key role in the overall tempera-
ture performance of the AD768. Any drift of I
REFIN
shows up
directly in I
OUT .
When the output is taken as a current, the drift
of I
REFIN
(which depends on both V
REF
and R
REF
) must be mini-
mized. T his can be done by using the internal temperature com-
pensated reference for V
REF
and a low temperature coefficient
resistor for R
REF.
If the output is taken as a voltage, it is a func-
tion of a resistor ratio, not an absolute resistor value.
By select-
ing resistors with matched temperature coefficients for R
REF
and R
LOAD,
the drift in the resistor values will cancel, providing
optimal drift performance.
RE FE RE NCE NOISE RE DUCT ION AND MULT IPLY ING
BANDWIDT H
For application flexibility and multiplying capabilities, the refer-
ence amplifier is designed to offer adjustable bandwidth that can
be reduced by connecting an external capacitor from the NR
node to the negative supply pin, V
EE
. T his capacitor limits the
bandwidth and acts as a filter to reduce the noise contribution
from the reference amplifier.
T he noise reduction capacitor, C
NR
, is not required for stability
and does not affect the settling time of the DAC output. With-
out this capacitor, the I
REFIN
bandwidth is 15 MHz allowing
high frequency modulation of the DAC full-scale range through
the reference input node. Figure 7 shows the relationship be-
tween the external noise reduction capacitor and the –3 dB
bandwidth of the reference amplifier.
NOISE REDUCTION CAPACITOR – F
B
100M
1k
10p
100p
1n
10n
100n
10M
1M
100k
10k
Figure 7. External Noise Reduction Capacitor vs. –3 dB
Bandwidth
T he sensitivity of the NR node requires that care be taken in
capacitor placement. T he capacitor should be located as physi-
cally close to the package pins as possible and lead lengths
should be minimized. For this purpose, the use of a chip
capacitor is recommended. For applications that do not require
high frequency modulation at IREFIN, it is recommended that
a capacitor on the order of 1
μ
F be connected from NR to V
EE
.
If the reference input is purely dc, noise may be minimized with
multiple capacitors, such as 1
μ
F and 0.1
μ
F, to more effectively
filter both high and low frequency disturbances.
ANALOG OUT PUT S
T he AD768 offers two analog outputs; IOUT A is trimmed for
optimal INL and DNL performance and has a full-scale output
when all bits are high. For applications that require the specified
dc accuracy, IOUT A should be used. IOUT B is the comple-
mentary output with full-scale output when all bits are low.
Both IOUT A and IOUT B provide similar dynamic perfor-
mance. Refer to Figures 8 and 9 for typical INL and DNL per-
formance curves. T he outputs can also be used differentially.
Refer to the section “Applying the AD768” for examples of vari-
ous output configurations.
DIGITAL INPUT CODE – k
8
–80
65
10
20
30
40
4
–2
–4
–6
6
0
2
I
50
60
5
15
25
35
45
55
Figure 8. Typical INL Performance
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