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| 型號： | AD7689ACPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 13/32頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 16BIT 250KSPS 8CH 20LFCSP |
| 產(chǎn)品培訓(xùn)模塊： | Power Line Monitoring Motor Control |
| 產(chǎn)品變化通告： | Startup Circuitry Design Improvement Change 15/April/2009 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | PulSAR® |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 250k |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 21mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 20-LFCSP-VQ |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 8 個單端，單極；4 個差分，雙極；4 個偽差分，雙極 |
| 產(chǎn)品目錄頁面： | 778 (CN2011-ZH PDF) |
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AD7682/AD7689
Data Sheet
Rev. D | Page 20 of 32
Input Configurations
Figure 30 shows the different methods for configuring the analog
inputs with the configuration register, CFG[12:10]. Refer to the
Configuration Register, CFG, section for more details.
The analog inputs can be configured as
Figure 30A, single-ended referenced to system ground;
CFG[12:10] = 1112.
In this configuration, all inputs (IN[7:0]) have a range of
GND to VREF.
Figure 30B, bipolar differential with a common reference
point; COM = VREF/2; CFG[12:10] = 0102.
Unipolar differential with COM connected to a ground
sense; CFG[12:10] = 1102.
In this configuration, all inputs IN[7:0] have a range of
GND to VREF.
Figure 30C, bipolar differential pairs with the negative
input channel referenced to VREF/2; CFG[12:10] = 00X2.
Unipolar differential pairs with the negative input channel
referenced to a ground sense; CFG[12:10] = 10X2.
In these configurations, the positive input channels have
the range of GND to VREF. The negative input channels are
a sense referred to VREF/2 for bipolar pairs, or GND for
unipolar pairs. The positive channel is configured with
CFG[9:7]. If CFG[9:7] is even, then IN0, IN2, IN4, and IN6
are used. If CFG[9:7] is odd, then IN1, IN3, IN5, and IN7
are used, as indicated by the channels with parentheses in
Figure 30C. For example, for IN0/IN1 pairs with the
positive channel on IN0, CFG[9:7] = 0002. For IN4/IN5
pairs with the positive channel on IN5, CFG[9:7] = 1012.
Note that for the sequencer, detailed in the Channel
Sequencer section, the positive channels are always IN0,
IN2, IN4, and IN6.
Figure 30D, inputs configured in any of the preceding
combinations (showing that the AD7682/AD7689 can be
configured dynamically).
GND
COM
CH0+
CH3+
CH1+
CH2+
CH4+
CH5+
CH6+
CH7+
CH0+
CH3+
CH1+
CH2+
CH4+
CH5+
CH6+
CH7+
COM–
GND
COM
IN1
IN0
IN2
IN3
IN4
IN5
IN6
IN7
IN1
IN0
IN2
IN3
IN4
IN5
IN6
IN7
IN1
IN0
IN2
IN3
IN4
IN5
IN6
IN7
IN1
IN0
IN2
IN3
IN4
IN5
IN6
IN7
A—8 CHANNELS,
SINGLE ENDED
B—8 CHANNELS,
COMMON REFERNCE
GND
COM
CH0+ (–)
CH1+ (–)
CH2+ (–)
CH3+ (–)
CH0– (+)
CH1– (+)
CH0+ (–)
CH1+ (–)
CH0– (+)
CH1– (+)
CH2– (+)
CH3– (+)
C—4 CHANNELS,
DIFFERENTIAL
GND
COM
CH2+
CH3+
CH4+
CH5+
D—COMBINATION
COM–
07
35
3-
03
2
Figure 30. Multiplexed Analog Input Configurations
Sequencer
scanning channels in a repeated fashion. Refer to the Channel
Sequencer section for further details of the sequencer operation.
Source Resistance
When the source impedance of the driving circuit is low, the
ances significantly affect the ac performance, especially THD.
The dc performances are less sensitive to the input impedance.
The maximum source impedance depends on the amount of
THD that can be tolerated. The THD degrades as a function of
the source impedance and the maximum input frequency.
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