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參數(shù)資料
| 型號： | AD7653ASTZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 13/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 16BIT 1MSPS W/REF 48-LQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | PulSAR® |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 1M |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 145mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應(yīng)商設(shè)備封裝： | 48-LQFP（7x7） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 2 個偽差分，單極 |
| 產(chǎn)品目錄頁面： | 778 (CN2011-ZH PDF) |
| 配用： | EVAL-AD7653CBZ-ND - BOARD EVALUATION FOR AD7653 |
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AD7653
CURRENT
CONVERSION
BUSY
DATA
BUS
t12
t13
02966-0-013
RD
CS
DIGITAL INTERFACE
The AD7653 has a versatile digital interface; it can be interfaced
with the host system by using either a serial or a parallel inter-
face. The serial interface is multiplexed on the parallel data bus.
The AD7653 digital interface also accommodates both 3 V and
5 V logic by simply connecting the OVDD supply pin of the
AD7653 to the host system interface digital supply. Finally, by
using the OB/2C input pin, both twos complement and straight
binary coding can be used.
The two signals, CS and RD, control the interface. CS and RD
have a similar effect because they are OR’d together internally.
When at least one of these signals is HIGH, the interface
outputs are in high impedance. Usually CS allows the selection
of each AD7653 in multicircuit applications and is held LOW in
a single AD7653 design. RD is generally used to enable the
conversion result on the data bus.
PARALLEL INTERFACE
The AD7653 is configured to use the parallel interface when
SER/PAR is held LOW. The data can be read either after each
conversion, which is during the next acquisition phase, or
during the following conversion, as shown in F
, respectively. When the data is read during the
conversion, however, it is recommended that it is read only
during the first half of the conversion phase. This avoids any
potential feedthrough between voltage transients on the digital
interface and the most critical analog conversion circuitry.
Figure 29. Slave Parallel Data Timing for Reading
(Read after Convert Mode)
Figure 30. Slave Parallel Data Timing for Reading
(Read during Convert Mode)
PREVIOUS
CONVERSION
t1
t3
t12
t13
t4
BUSY
DATA
BUS
02966-0-014
CNVST,
RD
CS = 0
The BYTESWAP pin allows a glueless interface to an 8-bit bus.
As shown in
, the LSB byte is output on D[7:0] and the
MSB is output on D[15:8] when BYTESWAP is LOW. When
BYTESWAP is HIGH, the LSB and MSB bytes are swapped and
the LSB is output on D[15:8] and the MSB is output on D[7:0].
By connecting BYTESWAP to an address line, the 16-bit data
can be read in two bytes on either D[15:8] or D[7:0].
Figure 31. 8-Bit Parallel Interface
CS
RD
BYTESWAP
PINS D[15:8]
PINS D[7:0]
HI-Z
HIGH BYTE
LOW BYTE
HIGH BYTE
HI-Z
t12
t13
02966-A-025
SERIAL INTERFACE
The AD7653 is configured to use the serial interface when
SER/PAR is held HIGH. The AD7653 outputs 16 bits of data,
MSB first, on the SDOUT pin. This data is synchronized with
the 16 clock pulses provided on the SCLK pin. The output data
is valid on both the rising and falling edges of the data clock.
Rev. A | Page 20 of 28
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7653ASTZRL | 功能描述:IC ADC 16BIT UNIPOLAR 48LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:PulSAR® 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個單端，單極；1 個單端，雙極 |
| AD7654 | 制造商:AD 制造商全稱:Analog Devices 功能描述:16-Bit, 750 kSPS, Unipolar/Bipolar Programmable Input PulSAR ADC |
| AD7654ACP | 制造商:Analog Devices 功能描述:ADC Single SAR 500ksps 16-bit Parallel/Serial 48-Pin LFCSP EP 制造商:Rochester Electronics LLC 功能描述:16-BIT SIMULTANEOUS SAMPLING 500KSPS ADC - Bulk 制造商:Analog Devices 功能描述:IC 16BIT ADC SMD 7654 LFSCP-48 |
| AD7654ACPRL | 制造商:Analog Devices 功能描述:ADC Single SAR 500ksps 16-bit Parallel/Serial 48-Pin LFCSP EP T/R 制造商:Analog Devices 功能描述:ADC SGL SAR 500KSPS 16BIT PARALLEL/SERL 48LFCSP EP - Tape and Reel 制造商:Rochester Electronics LLC 功能描述:16-BIT SIMULTANEOUS SAMPLING 500KSPS ADC - Bulk |
| AD7654ACPZ | 功能描述:IC ADC 16BIT DUAL 2CH 48-LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:PulSAR® 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
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