參數(shù)資料
型號: AD7652ASTZ
廠商: Analog Devices Inc
文件頁數(shù): 9/28頁
文件大?。?/td> 0K
描述: IC ADC 16BIT 500KSPS REF 48LQFP
標準包裝: 1
系列: PulSAR®
位數(shù): 16
采樣率(每秒): 500k
數(shù)據(jù)接口: 串行,并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 90mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP(7x7)
包裝: 托盤
輸入數(shù)目和類型: 2 個偽差分,單極
配用: EVAL-AD7652CBZ-ND - BOARD EVALUATION FOR AD7652
AD7652
Driver Amplifier Choice
TYPICAL CONNECTION DIAGRAM
Although the AD7652 is easy to drive, the driver amplifier needs
to meet the following requirements:
Figure 22 shows a typical connection diagram for the AD7652.
Analog Input
The driver amplifier and the AD7652 analog input circuit
must be able to settle for a full-scale step of the capacitor
array at a 16-bit level (0.0015%). In the amplifier’s data
sheet, settling at 0.1% to 0.01% is more commonly speci-
fied. This could differ significantly from the settling time at
a 16-bit level and should be verified prior to driver
selection. The tiny op amp AD8021, which combines
ultralow noise and high gain-bandwidth, meets this settling
time requirement even when used with gains up to 13.
Figure 23. Equivalent Analog Input Circuit
shows an equivalent circuit of the input structure of
the AD7652.
The two diodes, D1 and D2, provide ESD protection for the
analog inputs IN and INGND. Care must be taken to ensure
that the analog input signal never exceeds the supply rails by
more than 0.3 V. This will cause these diodes to become
forward-biased and start conducting current. These diodes can
handle a forward-biased current of 100 mA maximum. For
instance, these conditions could eventually occur when the
input buffer’s (U1) supplies are different from AVDD. In such a
case, an input buffer with a short-circuit current limitation can
be used to protect the part.
The noise generated by the driver amplifier needs to be
kept as low as possible in order to preserve the SNR and
transition noise performance of the AD7652. The noise
coming from the driver is filtered by the AD7652 analog
input circuit 1-pole low-pass filter made by R1 and C2 or
by the external filter, if one is used.
C2
R1
D1
D2
C1
IN
OR INGND
AGND
AVDD
02965-0-008
The driver needs to have a THD performance suitable to
that of the AD7652.
The AD8021 meets these requirements and is appropriate for
almost all applications. The AD8021 needs a 10 pF external
compensation capacitor that should have good linearity as an
NPO ceramic or mica type.
This analog input structure allows the sampling of the
differential signal between IN and INGND. Unlike other
converters, INGND is sampled at the same time as IN. By using
this differential input, small signals common to both inputs are
rejected. For instance, by using INGND to sense a remote signal
ground, ground potential differences between the sensor and
the local ADC ground are eliminated.
The AD8022 could also be used if a dual version is needed and
gain of +1 is present. The AD829 is an alternative in
applications where high frequency (above 100 kHz)
performance is not required. In gain of 1 applications, it requires
an 82 pF compensation capacitor. The AD8610 is an option
when low bias current is needed in low frequency applications.
During the acquisition phase, the impedance of the analog input
IN can be modeled as a parallel combination of capacitor C1
and the network formed by the series connection of R1 and C2.
C1 is primarily the pin capacitance. R1 is typically 168 and is
a lumped component made up of some serial resistors and the
on resistance of the switches. C2 is typically 60 pF and is mainly
the ADC sampling capacitor. During the conversion phase,
when the switches are opened, the input impedance is limited to
C1. R1 and C2 make a 1-pole low-pass filter that reduces
undesirable aliasing effect and limits the noise.
When the source impedance of the driving circuit is low, the
AD7652 can be driven directly. Large source impedances will
significantly affect the ac performance, especially total
harmonic distortion.
Rev. 0 | Page 17 of 28
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