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參數(shù)資料
| 型號(hào)： | AD7628KP |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 6/8頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 8BIT DUAL W/BUFF 20-PLCC |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 產(chǎn)品變化通告： | Product Discontinuance 27/Oct/2011 |
| 標(biāo)準(zhǔn)包裝： | 49 |
| 設(shè)置時(shí)間： | 400ns |
| 位數(shù)： | 8 |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 450mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 20-LCC（J 形引線(xiàn)） |
| 供應(yīng)商設(shè)備封裝： | 20-PLCC（9x9） |
| 包裝： | 管件 |
| 輸出數(shù)目和類(lèi)型： | 2 電流，單極；2 電流，雙極 |
| 采樣率（每秒）： | 2.9M |
AD7628
–6–
REV. A
APPLICATIONS INFORMATION
Application Hints
To ensure system performance consistent with AD7628 specifi-
cations, careful attention must be given to the following points:
1. GENERAL GROUND MANAGEMENT: AC or transient
voltages between the AD7628 AGND and DGND can cause
noise injection into the analog output. The simplest method
of ensuring that voltages at AGND and DGND are equal is
to tie AGND and DGND together at the AD7628. In more
omplex systems where the AGND–DGND intertie is on the
backplane, it is recommended that diodes be connected in
inverse parallel between the AD7628 AGND and DGND
pins (1N914 or equivalent).
2. OUTPUT AMPLIFIER OFFSET: CMOS DACs exhibit a
code-dependent output resistance which, in turn, causes a
code-dependent amplifier noise gain. The effect is a code-
dependent differential nonlinearity term at the amplifier
output that depends on VOS (VOS is amplifier input offset
voltage). This differential nonlinearity term adds to the R/2R
differential nonlinearity. To maintain monotonic operation, it
is recommended that amplifier VOS be no greater than 10% of
1 LSB over the temperature range of interest.
3. HIGH FREQUENCY CONSIDERATIONS: The output
capacitance of a CMOS DAC works in conjunction with the
amplifier feedback resistance to add a pole to the open loop
response. This can cause ringing or oscillation. Stability can
be restored by adding a phase compensation capacitor in
parallel with the feedback resistor.
DYNAMIC PERFORMANCE
The dynamic performance of the two DACs in the AD7628 will
depend on the gain and phase characteristics of the output am-
plifiers, together with the optimum choice of the PC board lay-
out and decoupling components. Figure 6 shows the relationship
between input frequency and channel-to-channel isolation.
Figure 6. Channel-to-Channel Isolation
Figure 7. Suggested PC Board Layout for AD7628 with
AD644 Dual Op Amp
Figure 7 shows a printed circuit layout for the AD7628 and the
AD644 dual op amp, which minimizes feedthrough and crosstalk.
SINGLE SUPPLY APPLICATIONS
The AD7628 DAC R-2R ladder termination resistors are con-
nected to AGND within the device. This arrangement is par-
ticularly convenient for single supply operation because AGND
may be biased at any voltage between DGND and VDD. Figure
8 shows a circuit that provides two +5 V to +8 V analog outputs
by biasing AGND +5 V up from DGND. The two DAC refer-
ence inputs are tied together and a reference input voltage is ob-
tained without a buffer amplifier by making use of the constant
and matched impedances of the DAC A and DAC B reference
inputs. Current flows through the two DAC R-2R ladders into
R1, and R1 is adjusted until the VREF A and VREF B inputs are
at +2 V. The two analog output voltages range from +5 V to
+8 V for DAC codes 00000000 to l l l l l l l l .
Figure 8. AD7628 Single Supply Operation
Figure 9 shows DAC A of the AD7628 connected in a positive
reference, voltage switching mode. This configuration is useful
because VOUT is the same polarity as VIN, allowing single supply
operation. However, to retain specified linearity, VIN must be in
the range 0 V to +2.5 V and the output buffered or loaded with
a high impedance (see Figure 10). Note that the input voltage is
connected to the DAC OUT A, and the output voltage is taken
from the DAC VREF A pin.
Figure 9. AD7628 Single Supply, Voltage Switching Mode
Figure 10. Typical AD7628 Performance in Single Supply
Voltage Switching Mode
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