參數(shù)資料
型號(hào): AD7628BQ
廠商: ANALOG DEVICES INC
元件分類(lèi): DAC
英文描述: CMOS Dual 8-Bit Buffered Multiplying DAC
中文描述: DUAL, PARALLEL, 8 BITS INPUT LOADING, 8-BIT DAC, CDIP20
封裝: 0.300 INCH, CERDIP-20
文件頁(yè)數(shù): 2/8頁(yè)
文件大?。?/td> 193K
代理商: AD7628BQ
T
= –40
8
C
to +85
8
C
T
= –55
8
C
to +125
8
C
1
Parameter
T
A
= +25
8
C
1
Units
T est Conditions/Comments
ST AT IC PERFORMANCE
2
Resolution
Relative Accuracy
Differential Nonlinearity
8
±
1/2
±
1
8
±
1/2
±
1
8
±
1/2
±
l
Bits
LSB max
LSB max
T his is an Endpoint Linearity Specification
All Grades Guaranteed Monotonic Over
Full Operating T emperature Range
Measured Using Internal RFB A and RFB B.
Both DAC Latches Loaded with 11111111.
Gain Error is Adjustable Using Circuits
of Figures 4 and 5.
Gain Error
±
2
±
3
±
3
LSB max
Gain T emperature Coefficient
3
Gain/
T emperature
Output Leakage Current
OUT A (Pin 2)
OUT B (Pin 20)
Input Resistance (V
REF
A, V
REF
B)
±
0.0035
±
0.0035
%/
°
C max
±
50
±
50
8
15
±
200
±
200
8
15
±
200
±
200
8
15
nA max
nA max
k
min
k
max
DAC Latches Loaded with 00000000
Input Resistance T C = –300 ppm/
°
C, T ypical
Input Resistance is 11 k
V
REF
A/V
REF
B Input Resistance
Match
DIGIT AL INPUT S
4
Input High Voltage (V
IH
)
Input Low Voltage (V
IL
)
Input Current (I
IN
)
Input Capacitance
DB0–DB7
WR
,
CS
,
DACA
/DACB
SWIT CHING CHARACT ERIST ICS
3
See T iming Diagram
Chip Select to Write Set Up T ime (t
CS
)
Chip Select to Write Hold T ime (t
CH
)
DAC Select to Write Set Up T ime (t
AS
)
DAC Select to Write Hold T ime (t
AH
)
Data Valid to Write Set Up T ime (t
DS
)
Data Valid to Write Hold T ime (t
DH
)
Write Pulse Width (t
WR
)
POWER SUPPLY
I
DD
, K Grade
B, T Grades
All Grades
±
1
±
1
±
1
% max
2.4
0.8
±
1
2.4
0.8
±
10
2.4
0.8
±
10
V min
V max
μ
A max
V
IN
= 0 or V
DD
10
15
10
15
10
15
pF max
pF max
160
10
160
10
160
10
150
160
10
160
10
160
10
170
210
10
210
10
210
10
210
ns min
ns min
ns min
ns min
ns min
ns min
ns min
See Figure 3
All Digital Inputs V
IL
or V
IH
All Digital Inputs V
or V
IH
All Digital Inputs 0 V or V
DD
2
2
100
2
2.5
500
mA
mA
μ
A
2.5
500
Specifications subject to change without notice.
AC PERFORMANCE CHARACTERISTICS
subject to test. V
DD
= +10.8 V to +15.75 V. (Measured Using Recommended PC Board Layout (Figure 7) and AD644 as Output Amplifiers)
T
= –40
8
C
to +85
8
C
1
T
= –55
8
C
to +125
8
π
C
1
Parameter
DC SUPPLY REJECT ION
(
GAIN/
V
DD
)
CURRENT SET T LING T IME
T
A
= +25
8
C
1
Units
T est Conditions/Comments
0.01
350
0.02
400
0.02
400
% per % max
V
DD
=
±
5%
ns max
T o 1/2 LSB OutA/OutB Load = 100
.
WR
=
CS
= 0 V.
DB0–DB7 = 0 V to V
DD
or V
DD
to 0 V
DIGIT AL-T O-ANALOG GLIT CH
IMPULSE
OUT PUT CAPACIT ANCE
C
OUT
A
C
OUT
B
C
OUT
A
C
OUT
B
AC FEEDT HROUGH
V
REF
A to OUT A
V
REF
B to OUT B
CHANNEL-T O-CHANNEL ISOLAT ION
V
REF
A to OUT B
330
nV sec typ
For Code T ransition 00000000 to 11111111
25
25
60
60
25
25
60
60
25
25
60
60
pF max
pF max
pF max
pF max
DAC Latches Loaded with 00000000
DAC Latches Loaded with 11111111
–70
–70
–65
–65
–65
–65
dB max
dB max
V
A, V
REF
B = 20 V p-p Sine Wave
@ 10 kHz
Both DAC Latches Loaded with 11111111.
V
REF
A = 20 V p-p Sine Wave @ 10 kHz
V
REF
B = 0 V See Figure 6.
V
REF
B = 20 V p-p Sine Wave @ 10 kHz
V
REF
A = 0 V See Figure 6.
Measured for Code T ransition 00000000
to 11111111
–80
dB typ
V
REF
B to OUT A
–80
dB typ
DIGIT AL CROSST ALK
60
nV sec typ
HARMONIC DIST ORT ION
–85
dB typ
V
IN
= 6 V rms @ 1 kHz
NOT ES
1
T emperature Ranges are K Version; –40
°
C to +85
°
C; B Version; –40
°
C to +85
°
C; T Version; –55
°
C to +125
°
C.
2
Specification applies to both DACs in AD7628.
3
Guaranteed by design but not production tested.
4
Logic inputs are MOS Gates. T ypical input current (+25
°
C) is less than 1 nA.
Specifications subject to change without notice.
REV. A
–2–
AD7628–SPECIFICATIONS
(V
DD
= +10.8 V to +15.75 V, V
REF
A = V
REF
B = +10 V; OUT A = OUT B = 0 V unless
otherwse noted)
These characteristics are included for Design Guidance only and are not
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