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| 型號： | AD7537 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | LC2MOS (8+4) Loading Dual 12-Bit DAC |
| 中文描述： | LC2MOS（8 4）載入中雙12位DAC |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 207K |
| 代理商： | AD7537 |
FUNCT IONAL BLOCK DIAGRAM
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
LC
2
MOS
(8+4) Loading Dual 12-Bit DAC
AD7537
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
FEATURES
Two 12-Bit DACs in One Package
DAC Ladder Resistance Matching: 0.5%
Space Saving Skinny DIP and Surface Mount Packages
4-Quadrant Multiplication
Low Gain Error (1 LSB max Over Temperature)
Byte Loading Structure
Fast Interface Timing
APPLICATIONS
Automatic Test Equipment
Programmable Filters
Audio Applications
Synchro Applications
Process Control
GE NE RAL DE SCRIPT ION
T he AD7537 contains two 12-bit current output DACs on one
monolithic chip. A separate reference input is provided for each
DAC. T he dual DAC saves valuable board space, and the
monolithic construction ensures excellent thermal tracking.
Both DACs are guaranteed 12-bit monotonic over the full tem-
perature range.
T he AD7537 has a 2-byte (8 LSBs, 4 MSBs) loading structure.
It is designed for right-justified data format. T he control signals
for register loading are A0, A1,
CS
,
WR
and
UPD
. Data is
loaded to the input registers when
CS
and
WR
are low. T o
transfer this data to the DAC registers,
UPD
must be taken low
with
WR
.
Added features on the AD7537 include an asynchronous
CLR
line which is very useful in calibration routines. When this is
taken low, all registers are cleared. T he double buffering of the
data inputs allows simultaneous update of both DACs. Also,
each DAC has a separate AGND line. T his increases the device
versatility; for instance one DAC may be operated with
AGND biased while the other is connected in the standard
configuration.
T he AD7537 is manufactured using the Linear Compatible
CMOS (LC
2
MOS) process. It is speed compatible with most
microprocessors and accepts T T L, 74HC and 5 V CMOS logic
level inputs.
PRODUCT HIGHLIGHT S
1. DAC to DAC Matching:
Since both DACs are fabricated on the same chip, precise
matching and tracking is inherent. Many applications which
are not practical using two discrete DACs are now possible.
T ypical matching: 0.5%.
2. Small Package Size:
T he AD7537 is packaged in small 24-pin 0.3" DIPs and in
28-terminal surface mount packages.
3. Wide Power Supply T olerance:
T he device operates on a +12 V to +15 V V
DD
, with
±
10%
tolerance on this nominal figure. All specifications are
guaranteed over this range.
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| AD7537AQ | 功能描述:IC DAC 12BIT DUAL MULT 24-CDIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標準包裝:750 系列:- 設(shè)置時間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
| AD7537BQ | 功能描述:IC DAC 12BIT DUAL MULT 24-CDIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標準包裝:2,400 系列:- 設(shè)置時間:- 位數(shù):18 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:3 電壓電源:模擬和數(shù)字 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:36-TFBGA 供應(yīng)商設(shè)備封裝:36-TFBGA 包裝:帶卷 (TR) 輸出數(shù)目和類型:* 采樣率（每秒）:* |
| AD7537BR | 制造商:AD 制造商全稱:Analog Devices 功能描述:LC2MOS 84) Loading Dual 12-Bit DAC |
| AD7537BR-REEL | 制造商:AD 制造商全稱:Analog Devices 功能描述:LC2MOS 84) Loading Dual 12-Bit DAC |
| AD7537BRZ | 制造商:AD 制造商全稱:Analog Devices 功能描述:LC2MOS 84) Loading Dual 12-Bit DAC |
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