AD7533
Rev. C | Page 3 of 12
SPECIFICATIONS
VDD = 15 V, VOUT1 = VOUT2 = 0 V, VREF = 10 V, unless otherwise noted.
Table 1.
Parameter
TA = 25°C
TA = Operating Range
Test Conditions
STATIC ACCURACY
Resolution
10 Bits
AD7533JN, AD7533AQ,
AD7533SQ, AD7533JP
±0.2% FSR maximum
AD7533KN, AD7533BQ,
AD7533KP, AD7533TE
±0.1% FSR maximum
AD7533LN, AD7533CQ, AD7533UQ
±0.05% FSR maximum
DNL
±1 LSB maximum
±1% FS maximum
Digital input = VINH
Gain/VDD
0.001%/% maximum
Digital inputs = VINH, VDD = 14 V to 17 V
Output Leakage Current
IOUT1
±5 nA maximum
±200 nA maximum
Digital inputs = VINL, VREF = ±10 V
IOUT2
±5 nA maximum
±200 nA maximum
Digital inputs = VINH, VREF = ±10 V
DYNAMIC ACCURACY
Output Current Settling Time
To 0.05% FSR; RLOAD = 100 Ω, digital
inputs = VINH to VINL or VINL to VINH
Feedthrough Error
Digital inputs = VINL, VREF = ±10 V,
100 kHz sine wave
Propagation Delay
100 ns typical
Glitch Impulse
100 nV-s typical
REFERENCE INPUT
Input Resistance (VREF)
5 kΩ min, 20 kΩ maximum
11 kΩ nominal
ANALOG OUTPUTS
Output Capacitance
CIOUT1
Digital inputs = VINH
CIOUT2
CIOUT1
CIOUT2
Digital inputs = VINL
DIGITAL INPUTS
Input High Voltage (VINH)
2.4 V minimum
Input Low Voltage (VINL)
0.8 V maximum
Input Leakage Current (IIN)
±1 μA maximum
VIN = 0 V and VDD
Input Capacitance (CIN)
POWER REQUIREMENTS
VDD
15 V ± 10%
Rated accuracy
5 V to 16 V
Functionality with degraded performance
IDD
2 mA maximum
Digital inputs = VINL or VINH D
25 μA maximum
50 μA maximum
Digital inputs over VIN
1 FSR = full-scale range.
2 Full scale (FS) = VREF.
3 Maximum gain change from TA = 25°C to TMIN or TMAX is ±0.1% FSR.
4 AC parameter, sample tested to ensure specification compliance.
5 Guaranteed, not tested.
6 Absolute temperature coefficient is approximately 300 ppm/°C.