參數(shù)資料
型號(hào): AD7533BQ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 1/12頁(yè)
文件大小: 0K
描述: IC DAC 10BIT MULTIPLYING 16-CDIP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
產(chǎn)品變化通告: Product Discontinuance 27/Oct/2011
標(biāo)準(zhǔn)包裝: 25
設(shè)置時(shí)間: 600ns
位數(shù): 10
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 30mW
工作溫度: -40°C ~ 85°C
安裝類型: 通孔
封裝/外殼: 16-CDIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 16-CDIP
包裝: 管件
輸出數(shù)目和類型: 2 電流,單極;2 電流,雙極
采樣率(每秒): 1.7M
CMOS Low Cost,
10-Bit Multiplying DAC
AD7533
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2007 Analog Devices, Inc. All rights reserved.
FEATURES
Low cost 10-bit DAC
Low cost AD7520 replacement
Linearity: LSB, 1 LSB, or 2 LSB
Low power dissipation
Full 4-quadrant multiplying DAC
CMOS/TTL direct interface
Latch free (protection Schottky not required)
Endpoint linearity
APPLICATIONS
Digitally controlled attenuators
Programmable gain amplifiers
Function generation
Linear automatic gain controls
GENERAL DESCRIPTION
The AD7533 is a low cost, 10-bit, 4-quadrant multiplying DAC
manufactured using an advanced thin-film-on-monolithic-
CMOS wafer fabrication process.
Pin and function equivalent to the AD7520 industry standard,
the AD7533 is recommended as a lower cost alternative for old
AD7520 sockets or new 10-bit DAC designs.
AD7533 application flexibility is demonstrated by its ability to
interface to TTL or CMOS, operate on 5 V to 15 V power, and
provide proper binary scaling for reference inputs of either
positive or negative polarity.
FUNCTIONAL BLOCK DIAGRAM
20k
S1
S2
S3
SN
IOUT2
VREF
IOUT1
RFB
20k
10k
BIT 1 (MSB)
BIT 10 (LSB)
DIGITAL INPUTS (DTL/TTL/CMOS COMPATIBLE)
BIT 2
BIT 3
10k
20k
01
13
4-
0
01
Figure 1.
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