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參數(shù)資料
| 型號(hào)： | AD7530KN |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | DAC |
| 英文描述： | 10-Bit, 12-Bit Binary Multiplying D/A Converter |
| 中文描述： | PARALLEL, WORD INPUT LOADING, 0.5 us SETTLING TIME, 10-BIT DAC, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 6/14頁 |
| 文件大小： | 264K |
| 代理商： | AD7530KN |
Typical Applications
(Continued)
TL/H/5689–5
V
OUT
e b
V
REF
#
A1
2
a
A2
4
a
# # #
a
A10
1024
b
1
1024
J
where: AN
e a
1 if A
N
input is high
AN
e b
1 if A
N
input is low
COMPLEMENTARY OFFSET BINARY
(BIPOLAR) OPERATION
DIGITAL INPUT
V
OUT
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 1 V
REF
c
1022/1024
0 1 1 1 1 1 1 1 1 1
1 0 0 0 0 0 0 0 0 0
1 0 0 0 0 0 0 0 0 1
1 1 1 1 1 1 1 1 1 1
b
V
REF
(1022/1024)
a
V
REF
V
REF
c
2/1024
0
b
V
REF
c
2/1024
Note that:
#
I
OUT 1
a
I
OUT 2
e
V
REF
R
LADDER
c
#
1023
1024
J
#
By doubling the output range we get half the
resolution
#
The 10M resistor, adds a 1 LSB ‘‘thump’’, to
allow full offset binary operation where the out-
put reaches zero for the half-scale code. If
symmetrical output excursions are required,
omit the 10M resistor.
FIGURE 7. Bipolar 4-Quadrant Multiplying Configuration
Operational Amplifiers V
OS
Adjust
(Figure 7)
a)
Switch all the digital inputs high; adjust the V
OS
potenti-
ometer of op amp B to bring its output to a value equal
to
b
(V
REF
/1024) (V).
Switch the MSB high and the remaining digital inputs
low. Adjust the V
OS
potentiometer of op amp A, to bring
its output value to within a 1 mV from ground potential.
For V
REF
k
10V, a finer adjust is necessary, as already
mentioned in the previous application.
b)
Gain Adjust (Full-Scale Adjust)
Assuming that the external 10k resistors are matched to
better than 0.1%, the gain adjust of the circuit is the same
with the one previously discussed.
TL/H/5689–6
TRUE OFFSET BINARY OPERATION
DIGITAL INPUT
V
OUT
1
1
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
V
REF
c
1022/1024
0
b
V
REF
t
s
e
1.8
m
s
use LM336 for a voltage reference
FIGURE 8. Bipolar Configuration with a Single Op Amp
#
R4
e
(2A
V
b
b
1) R,R1
e
A
V
b
A
V
b
b
1,
R3
a
R1
ll
R2
e
R; A
V
b
e
V
OUT(PEAK)
V
REF
, R
e
20k
#
Example: V
REF
e
2V, V
OUT
(swing)
j
g
10V: A
V
b
e
5V
Then R4
e
9R, R1
e
0.8 R2. If R1
e
0.2R then R2
e
0.25R,
R3
e
0.64R
FIGURE 9. Bipolar Configuration with
Increased Output Swing
http://www.national.com
6
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