
10-12
Applications
Unipolar Binary Operation
The circuit configuration for operating the AD7520 in unipo-
lar mode is shown in Figure 8. Similar circuits can be used
for AD7521, AD7530 and AD7531. With positive and nega-
tive V
REF
values the circuit is capable of 2-Quadrant multipli-
cation. The “Digital Input Code/Analog Output Value” table
for unipolar mode is given in Table 1.
Zero Offset Adjustment
1. Connect all digital inputs to GND.
2. Adjust the offset zero adjust trimpot of the output
operational amplifier for 0V at V
OUT
.
Gain Adjustment
1. Connect all digital inputs to V+.
2. Monitor VOUT for a -V
REF
(1-2
-N
) reading. (N = 10 for
AD7520/30 and N = 12 for AD7521/31).
3. To decrease V
OUT
, connect a series resistor (0 to 250
)
between the reference voltage and the V
REF
terminal.
4. To increase V
OUT
, connect a series resistor (0 to 250
) in
the I
OUT1
amplifier feedback loop.
Bipolar (Offset Binary) Operation
The circuit configuration for operating the AD7520 in the
bipolar mode is given in Figure 9. Similar circuits can be
used for AD7521, AD7530 and AD7531. Using offset binary
digital input codes and positive and negative reference volt-
age values, 4-Quadrant multiplication can be realized. The
“Digital Input Code/Analog Output Value” table for bipolar
mode is given in Table 2.
A “Logic 1” input at any digital input forces the corresponding
ladder switch to steer the bit current to I
OUT1
bus. A “Logic 0”
input forces the bit current to I
OUT2
bus. For any code the
I
OUT1
and I
OUT2
bus currents are complements of one
another. The current amplifier at I
OUT2
changes the polarity of
I
OUT2
current and the transconductance amplifier at I
OUT1
out-
put sums the two currents. This configuration doubles the out-
put range. The difference current resulting at zero offset binary
code, (MSB = “Logic 1”, All other bits = “Logic 0”), is corrected
by using an external resistor, (10M
), from V
REF
to I
OUT2
.
Offset Adjustment
1. Adjust V
REF
to approximately +10V.
2. Connect all digital inputs to “Logic 1”.
3. Adjust I
OUT2
amplifier offset adjust trimpot for 0V
±
1mV at
I
OUT2
amplifier output.
4. Connect MSB (Bit 1) to “Logic 1” and all other bits to “Logic 0”.
5. Adjust I
OUT1
amplifier offset adjust trimpot for 0V
±
1mV at
V
OUT
.
Gain Adjustment
1. Connect all digital inputs to V+.
2. Monitor V
OUT
for a -V
REF
(1-2-
(N-1)
volts reading. (N = 10 for
AD7520 and AD7530, and N = 12 for AD7521 and AD7531).
3. To increase V
OUT
, connect a series resistor of up to 250
between V
OUT
and R
FEEDBACK
.
4. To decrease V
OUT
, connect a series resister of up to 250
between the reference voltage and the V
REF
terminal.
TABLE 1. CODE TABLE - UNlPOLAR BINARY OPERATION
DIGITAL INPUT
ANALOG OUTPUT
-V
REF
(1-2
-N
)
-V
REF
(
1
/
2
+ 2
-N
)
-V
REF
/2
-V
REF
(
1
/
2
-2
-N
)
-V
REF
(2
-N
)
0
1111111111
1000000001
1000000000
0111111111
0000000001
0000000000
NOTES:
1. LSB = 2
-N
V
REF
.
2. N = 10 for 7520, 7530;
N = 12 for 7521, 7531.
15
4
16
1
5
AD7520
13
3
2
BIT 1 (MSB)
BIT 10 (LSB)
14
+15V
V
REF
GND
I
OUT1
I
OUT2
6
+
V
OUT
-
R
FEEDBACK
DIGITAL
INPUT
FIGURE 8. UNIPOLAR BINARY OPERATION (2-QUADRANT
MULTIPLICATION)
TABLE 2. BlPOLAR (OFFSET BINARY) CODE TABLE
DIGITAL INPUT
ANALOG OUTPUT
-V
REF
(1-2
-(N-1)
)
-V
REF
(2
-(N-1)
)
0
V
REF
(2
-(N-1)
)
V
REF
(1-2
-(N-1)
)
V
REF
1111111111
1000000001
1000000000
0111111111
0000000001
0000000000
NOTES:
1. LSB = 2
-(N-1)
V
REF
.
2. N = 10 for 7520, 7521;
N = 12 for 7530, 7531.
15
4
16
1
5
AD7520
13
3
2
BIT 1
(MSB)
BIT 10
(LSB)
14
+15V
V
REF
I
OUT2
6
+
V
O
-
R
FEEDBACK
6
+
-
I
OUT1
R1 10K
0.01%
R2 10K
0.01%
D
I
R3
10M
FIGURE 9. BIPOLAR OPERATION (4-QUADRANT MULTIPLICATION)
AD7520, AD7530, AD7521, AD7531