- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10541 > AD7495BRMZ (Analog Devices Inc)IC ADC 12BIT SRL LP W/REF 8MSOP PDF資料下載
參數(shù)資料
| 型號： | AD7495BRMZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 16/25頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT SRL LP W/REF 8MSOP |
| 標準包裝： | 50 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 1M |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 10.5mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應商設備封裝： | 8-MSOP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 1 個單端，單極 |
AD7475/AD7495
Rev. B | Page 22 of 24
The timer registers are loaded with a value that provides an
interrupt at the required sample interval. When an interrupt is
received, a value is transmitted with TFS/DT (ADC control
word). The TFS is used to control the RFS, and therefore, the
reading of data. The frequency of the serial clock is set in the
SCLKDIV register. When the instruction to transmit with TFS
is given, (that is, AX0 = TX0), the state of the SCLK is checked.
The DSP waits until the SCLK has gone high, low, and high
before transmission starts. If the timer and SCLK values are
chosen such that the instruction to transmit occurs on or near
the rising edge of SCLK, the data can be transmitted or it can
wait until the next clock edge.
For example, the ADSP-2111 has a master clock frequency of
16 MHz. If the SCLKDIV register is loaded with the value 3, an
SCLK of 2 MHz is obtained, and eight master clock periods
elapse for every one SCLK period. If the timer registers are
loaded with the value 803, 100.5 SCLKs occur between
interrupts and subsequently between transmit instructions.
This situation results in nonequidistant sampling because the
transmit instruction is occurring on a SCLK edge. If the
number of SCLKs between interrupts is a whole integer figure
of N, equidistant sampling is implemented by the DSP.
AD7475/AD7495 TO DSP56XXX
The connection diagram in Figure 30 shows how the AD7475/
AD7495 can be connected to the synchronous serial interface
(SSI) of the DSP56xxx family of devices from Motorola. The SSI
is operated in synchronous mode (SYN bit in CRB = 1) with
internally generated 1-bit clock period frame sync for both Tx
and Rx (Bits FSL1 = 1 and FSL0 = 0 in CRB). Set the word
length to 16 by setting Bits WL1 = 1 and WL0 = 0 in CRA. To
implement the power-down modes on the AD7475/AD7495,
the word length can be changed to 8 bits by setting Bit WL1 = 0
and Bit WL0 = 0 in CRA. For signal processing applications, it
is imperative that the frame synchronization signal from the
DSP56xxx provide equidistant sampling. The VDRIVE pin of the
AD7475/AD7495 takes the same supply voltage as that of the
DSP56xxx. This allows the ADC to operate at a voltage higher
than the serial interface, that is, DSP56xxx, if necessary.
AD7475/AD7495*
SCLK
*ADDITIONAL PINS OMITTED FOR CLARITY
SCLK
SC2
SDATA
VDRIVE
VDD
DSP56xxx*
SRD
01684-
B-
031
CS
Figure 30. Interfacing to the DSP56xxx
AD7475/AD7495 TO MC68HC16
The serial peripheral interface (SPI) on the MC68HC16 is
configured for master mode (MSTR) = 1, clock polarity bit
(CPOL) = 1, and the clock phase bit (CPHA) = 0. The SPI is
configured by writing to the SPI control register (SPCR), as
described in the 68HC16 User Manual. The serial transfer takes
place as a 16-bit operation when the size bit in the SPCR
register is set to size = 1. To implement the power-down modes
with an 8-bit transfer, set size = 0. (A connection diagram is
takes the same supply voltage as that of the MC68HC16. This
allows the ADC to operate at a higher voltage than the serial
interface, that is, the MC68HC16, if necessary.
AD7475/AD7495*
SCLK
*ADDITIONAL PINS OMITTED FOR CLARITY
MISO/PMC0
SS/PMC3
SDATA
VDRIVE
VDD
MC68HC16*
SCLK/PCM2
01684-
B-
032
CS
Figure 31. Interfacing to the MC68HC16
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD7495BRZ | IC ADC 12BIT SRL LP W/REF 8-SOIC |
| UTS7124S | CONN RCPT 4X1.6 FEMALE JAM NUT |
| VI-J11-MY-F3 | CONVERTER MOD DC/DC 12V 50W |
| VE-JWZ-MY-F4 | CONVERTER MOD DC/DC 2V 20W |
| VE-JWZ-MX-F1 | CONVERTER MOD DC/DC 2V 30W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7495BR-REEL | 功能描述:IC ADC 12BIT SRL LP W/REF 8-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應商設備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
| AD7495BR-REEL7 | 制造商:Analog Devices 功能描述:ADC Single SAR 1Msps 12-bit Serial 8-Pin SOIC N T/R 制造商:Analog Devices 功能描述:ADC SGL SAR 1MSPS 12-BIT SERL 8SOIC N - Tape and Reel 制造商:Rochester Electronics LLC 功能描述:FAST 12-BIT LOW-POWER SERIAL ADC I.C. - Tape and Reel |
| AD7495BRZ | 功能描述:IC ADC 12BIT SRL LP W/REF 8-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標準包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應商設備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| AD7495BRZ3 | 制造商:AD 制造商全稱:Analog Devices 功能描述:1MSPS,12-Bit ADCs |
| AD7495BRZ-REEL | 功能描述:IC ADC 12BIT SRL LP W/REF 8-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個單端，單極 |
發(fā)布緊急采購，3分鐘左右您將得到回復。