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參數(shù)資料
| 型號： | AD7492BR-5 |
| 英文描述： | 500kHz High Efficiency 3A Switching Regulator; Package: TO-220; No of Pins: 7; Temperature Range: 0°C to +70°C |
| 中文描述： | 的A / D轉換器 |
| 文件頁數(shù)： | 13/16頁 |
| 文件大?。?/td> | 194K |
| 代理商： | AD7492BR-5 |
REV. 0
AD7492
–13–
GROUNDING AND LAYOUT
The analog and digital power supplies are independent and
separately pinned out to minimize coupling between analog and
digital sections within the device. To complement the excellent
noise performance of the AD7492 it is imperative that care be
given to the PCB layout. Figure 18 shows a recommended
connection diagram for the AD7492.
All of the AD7492 ground pins should be soldered directly to a
ground plane to minimize series inductance. The AV
DD
, DV
DD
,
and V
DRIVE
pins should be decoupled to both the analog and
digital ground planes. The REF OUT pin should be decoupled
to the analog ground plane with a minimum capacitor value of
100 nF. This capacitor helps to stabilize the internal reference
circuit. The large value capacitors will decouple low frequency
noise to analog ground, the small value capacitors will decouple
high frequency noise to digital ground. All digital circuitry power
pins should be decoupled to the digital ground plane. The use
of ground planes can physically separate sensitive analog com-
ponents from the noisy digital system. The two ground planes
should
be joined in
only
one place and should not overlap so as
to minimize capacitive coupling between them. If the AD7492
is in a system where multiple devices require AGND to DGND
connections, the connection should still be made at one point
only, a star ground point, that should be established as close as
possible to the AD7492.
AD7492
10 F
+
1nF
1nF
+
10 F
100nF
DV
DD
AGND
DGND
V
DRIVE
REF OUT
AV
DD
+
0.1 F
47 F
ANALOG
SUPPLY
5V
+
2.5V
Figure 18. Typical Decoupling Circuit
Noise can be minimized by applying some simple rules to the
PCB layout: analog signals should be kept away from digital
signals; fast switching signals like clocks should be shielded with
digital ground to avoid radiating noise to other sections of the
board and clock signals should never be run near the analog
inputs; avoid running digital lines under the device as these will
couple noise onto the die; the power supply lines to the AD7492
should use as large a trace as possible to provide a low imped-
ance path and reduce the effects of glitches on the power supply
line; avoid crossover of digital and analog signals and place
traces that are on opposite sides of the board at right angles
to each other.
Noise to the analog power line can be further reduced by use of
multiple decoupling capacitors as shown in Figure 18. Decou-
pling capacitors should be placed directly at the power inlet to
the PCB and also as close as possible to the power pins of the
AD7492. The same decoupling method should be used on other
ICs on the PCB, with the capacitor leads as short as possible to
minimize lead inductance.
Figure 15 to Figure 17 show a typical graphical representation
of Power versus Throughput for the AD7492 when in (a) Mode
1 @ 5 V and 3 V, (b) Mode 2 in full sleep mode @ 5 V and 3 V
and (c) Mode 2 in partial sleep mode @ 5 V and 3 V.
THROUGHPUT
–
kHz
0
P
–
500
600
700
900
1000
2
4
6
8
10
12
800
400
300
200
100
0
3V
5V
Figure 15. Power vs. Throughput (Mode 1 @ 5 V and 3 V)
THROUGHPUT
–
kHz
0
P
–
50
60
70
90
100
0.5
1.0
80
40
30
20
10
0
1.5
2.0
2.5
3.0
3.5
3V
5V
Figure 16. Power vs. Throughput (Mode 2 in Full Sleep
Mode @ 5 V and 3 V)
THROUGHPUT
–
kHz
0
P
–
50
60
70
90
100
0.5
1.0
80
40
30
20
10
0
1.5
2.0
2.5
3V
5V
Figure 17. Power vs. Throughput (Mode 2 in Partial
Sleep Mode @ 5 V and 3 V)
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PDF描述 |
|---|---|
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD7492BR-5-REEL | 制造商:Analog Devices 功能描述:ADC Single SAR 1.25Msps 12-bit Parallel 24-Pin SOIC W T/R 制造商:Analog Devices 功能描述:ADC SGL SAR 1.25MSPS 12-BIT PARALLEL 24SOIC W - Tape and Reel |
| AD7492BR-5-REEL7 | 制造商:Analog Devices 功能描述:ADC Single SAR 1.25Msps 12-bit Parallel 24-Pin SOIC W T/R 制造商:Analog Devices 功能描述:ADC SGL SAR 1.25MSPS 12-BIT PARALLEL 24SOIC W - Tape and Reel |
| AD7492BR-REEL | 功能描述:IC ADC 12BIT W/REF W/CLK 24-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:- 標準包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個單端，單極；1 個單端，雙極 |
| AD7492BR-REEL7 | 功能描述:IC ADC 12BIT W/REF W/CLK 24-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:- 標準包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個單端，單極；1 個單端，雙極 |
| AD7492BRU | 功能描述:IC ADC 12BIT W/REF W/CLK 24TSSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應商設備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
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