Data Sheet
AD7490
Rev. D | Page 3 of 28
SPECIFICATIONS
VDD = VDRIVE = 2.7 V to 5.25 V, REFIN = 2.5 V, fSCLK1 = 20 MHz, TA = TMIN to TMAX, unless otherwise noted. Temperature range (B Version): 40°C to +85°C.
Table 1.
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
fIN = 50 kHz sine wave, fSCLK = 20 MHz
Signal-to-(Noise + Distortion) (SINA
D)2VDD = 5 V
69
70.5
dB
VDD = 3 V
68
69.5
dB
Signal-to-Noise Ratio (S
NR)269.5
dB
Total Harmonic Distortion (TH
D)2VDD = 5 V
84
74
dB
VDD = 3 V
77
71
dB
Peak Harmonic or Spurious Noise (SFD
R)2VDD = 5 V
86
75
dB
VDD = 3 V
80
73
dB
Intermodulation Distortion (IM
D)2fa = 40.1 kHz, fb = 41.5 kHz
Second-Order Terms
85
dB
Third-Order Terms
85
dB
Aperture Delay
10
ns
Aperture Jitter
50
ps
Channel-to-Channel Isolati
on2fIN = 400 kHz
82
dB
Full Power Bandwidth
3 dB
8.2
MHz
0.1 dB
1.6
MHz
Resolution
12
Bits
Integral Nonlinearity
±1
LSB
Differential Nonlinearity
Guaranteed no missed codes to 12 bits
0.95/+1.5
LSB
0 V to REFIN Input Range
Straight binary output coding
Offset Error
±0.6
±8
LSB
Offset Error Match
±0.5
LSB
Gain Error
±2
LSB
Gain Error Match
±0.6
LSB
0 V to 2 × REFIN Input Range
REFIN to +REFIN biased about REFIN
with twos complement output coding
offset
Positive Gain Error
±2
LSB
Positive Gain Error Match
±0.5
LSB
Zero Code Error
±0.6
±8
LSB
Zero Code Error Match
±0.5
LSB
Negative Gain Error
±1
LSB
Negative Gain Error Match
±0.5
LSB
ANALOG INPUT
Input Voltage Range
RANGE bit set to 1
0
REFIN
V
RANGE bit set to 0, VDD = 4.75 V to 5.25 V
for 0 V to 2 × REFIN
0
2 × REFIN
V
DC Leakage Current
±1
A
Input Capacitance
20
pF
REFERENCE INPUT
REFIN Input Voltage
±1% specified performance
2.5
V
DC Leakage Current
±1
A
REFIN Input Impedance
fSAMPLE = 1 MSPS
36
k