
AD7476/AD7477
a
Prelimnary Technical Data
REV. PrF 08/99
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Analog Devices, Inc., 1998
1MSPS,
10- / 12-Bit ADCs in 6 Lead SOT-23
using
CS
and the serial clock, allowing the devices to
interface with microprocessors or DSPs. T he input signal
is sampled on the falling edge of
CS
and the conversion is
also initiated at this point. T here are no pipelined delays
associated with the part.
T he AD7476/AD7477 use advanced design techniques to
achieve very low power dissipation at high throughput
rates.
T he reference for the part is taken internally from V
DD.
T he analog input range for the part is 0 to V
DD
. T he con-
version rate is determined by the SCLK .
TECHNCAL
F UNC T IONA L BL OC K D IA GR A M
FEATURES
Fast Throughput Rate: 1MSPS
Specified for V
DD
of 2.35 V to 5.25 V
Low Power:
3.6mW typ at 1MSPS with 3V Supplies
15mW typ at 1MSPS with 5V Supplies
Wide Input Bandwidth:
70dB SNR at 200kHz Input Frequency
Flexible Power/Serial Clock Speed Management
No Pipeline Delays
High Speed Serial Interface
SPI/QSPI/
μ
Wire/DSP Compatible
Standby Mode: 1
μ
A max
6-Lead SOT-23 Package
G E NE R A L D E SC R IP T ION
T he AD7476/AD7477 are 12-bit and 10-bit, high speed,
low power, successive-approximation ADC s respectively.
T he parts operate from a single 2.35 V to 5.25 V power
supply and feature throughput rates up to 1MSPS. T he
parts contain a low-noise, wide bandwidth track/hold am-
plifier which can handle input frequencies in excess of
1M H z.
T he conversion process and data acquisition are controlled
P R OD UC T H IG H L IG H T S
1. First 10-/12-Bit ADCs in a SOT -23 package.
2. High T hroughput with Low Power Consumption
3. Flexible Power/Serial Clock Speed Management
T he conversion rate is determined by the serial clock
allowing the conversion time to be reduced through the
serial clock speed increase. T his allows the average power
cunsumption to be reduced when a powerdown mode is
used while not converting. T he part also features a shut-
down mode to maximize power efficiency at lower
throughput rates. Power consumption is 1
μ
A max when
in shutdown.
4. No Pipeline Delay
T he part features a standard successive-approximation
ADC with accurate control of the sampling instant via a
CS
input and once off conversion control.
T/H
VIN
AD7476/AD7477
VDD
10-/12-BIT
SUCCESSIVE
APPROXIMATION
ADC
SCLK
CONTROL LOGIC
SDATA
CS
GND