AD7450–SPECIFICATIONS1 Parameter Conditions/Comments A Version B Version Unit DYNAMIC PERFORMANCE Si" />
參數(shù)資料
型號: AD7450ARZ-REEL
廠商: Analog Devices Inc
文件頁數(shù): 12/22頁
文件大?。?/td> 0K
描述: IC ADC 12BIT DIFF IN 1MSPS 8SOIC
標準包裝: 2,500
位數(shù): 12
采樣率(每秒): 1M
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 9.25mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 1 個差分,單極
配用: EVAL-AD7450CBZ-ND - BOARD EVALUATION FOR AD7450
–2–
AD7450–SPECIFICATIONS1
Parameter
Conditions/Comments
A Version
B Version
Unit
DYNAMIC PERFORMANCE
Signal-to-(Noise + Distortion) Ratio
VDD = 5 V
70
dB min
(SINAD)
3
VDD = 3 V
68
dB min
Total Harmonic Distortion (THD)
3
VDD = 5 V, –80 dB typ
–75
dB max
VDD = 3 V, –78 dB typ
–73
dB max
Peak Harmonic or Spurious Noise
3
VDD = 5 V, –82 dB typ
–75
dB max
VDD = 3 V, –80 dB typ
–73
dB max
Intermodulation Distortion (IMD)
3
Second Order Terms
–85
dB typ
Third Order Terms
–85
dB typ
Aperture Delay
3
10
ns typ
Aperture Jitter
3
50
ps typ
Full Power Bandwidth
3
@ –3 dB
20
MHz typ
@ –0.1 dB
2.5
MHz typ
Power Supply Rejection Ratio
(PSRR)
3, 4
–87
dB typ
DC ACCURACY
Resolution
12
Bits
Integral Nonlinearity (INL)
3
±2
±1
LSB max
Differential Nonlinearity (DNL)
3
Guaranteed No Missed
Codes to 12 Bits
–1/+2
±1
LSB max
Zero Code Error
3
VDD = 5 V
±3
LSB max
VDD = 3 V
±6
LSB max
Positive Gain Error
3
VDD = 5 V
±3
LSB max
VDD = 3 V
±6
LSB max
Negative Gain Error
3
VDD = 5 V
±3
LSB max
VDD = 3 V
±6
LSB max
ANALOG INPUT
Full-Scale Input Span
2
VREF
5
VIN+ – VIN–
V
Absolute Input Voltage
VIN+
VCM
2 = V
REF
VCM
± V
REF/2
VCM
± V
REF/2
V
VIN–
VCM
2 = V
REF
VCM
± VREF/2
VCM
± VREF/2
V
DC Leakage Current
±1
A max
Input Capacitance
When in Track
20
pF typ
When in Hold
6
pF typ
REFERENCE INPUT
VREF Input Voltage
5 V supply (
±1% tolerance for
specified performance)
2.5
6
2.5
6
V
3 V supply (
±1% tolerance for
specified performance)
1.25
7
1.25
7
V
DC Leakage Current
±1
A max
VREF Input Capacitance
15
pF typ
LOGIC INPUTS
Input High Voltage, VINH
2.4
V min
Input Low Voltage, VINL
0.8
V max
Input Current, IIN
Typically 10 nA, VIN = 0 V or VDD
±1
A max
Input Capacitance, CIN
8
10
pF max
LOGIC OUTPUTS
Output High Voltage, VOH
VDD = 5 V, ISOURCE = 200
A
2.8
V min
VDD = 3 V, ISOURCE = 200
A
2.4
V min
Output Low Voltage, VOL
ISINK = 200
A
0.4
V max
Floating-State Leakage Current
±1
A max
Floating-State Output Capacitance
8
10
pF max
Output Coding
Two’s
Complement
(VDD = 2.7 V to 3.3 V, fSCLK = 15 MHz, fS = 833 kSPS, VREF = 1.25 V, FIN = 200 kHz;
VDD = 4.75 V to 5.25 V, fSCLK = 18 MHz, fS = 1 MSPS, VREF = 2.5 V, FIN = 300 kHz; VCM
2 = V
REF; TA = TMIN to TMAX, unless otherwise noted.)
Rev. A
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