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參數(shù)資料
| 型號(hào)： | AD744KRZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 4/12頁 |
| 文件大小： | 0K |
| 描述： | IC OPAMP BIFET 13MHZ PREC 8SOIC |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 放大器類型： | J-FET |
| 電路數(shù)： | 1 |
| 轉(zhuǎn)換速率： | 75 V/µs |
| -3db帶寬： | 13MHz |
| 電流 - 輸入偏壓： | 30pA |
| 電壓 - 輸入偏移： | 250µV |
| 電流 - 電源： | 3.5mA |
| 電流 - 輸出 / 通道： | 25mA |
| 電壓 - 電源，單路/雙路(±)： | ±4.5 V ~ 18 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 帶卷 (TR) |
REV.C
–12–
AD744
C00833a-0-7/00
(rev.
C)
PRINTED
IN
U.S.A.
In either case, the capacitance CX causes the system to go from
a one-pole to a two-pole response; this additional pole increases
settling time by introducing peaking or ringing in the op amp’s
output. If the value of CX can be estimated with reasonable accu-
racy, Equation 2 can be used to choose the correct value for
a small capacitor, CL, which will optimize amplifier response. If
the value of CX is not known, CL should be a variable capacitor.
As an aid to the designer, the optimum value of CL for one spe-
cific amplifier connection can be determined from the graph of
Figure 41. This graph has been produced for the case where the
AD744 is connected as in Figures 39 and 40 with a practical
minimum value for CSTRAY of 2 pF and a total CX value of 7.5 pF.
The approximate value of CL can be determined for almost any
application by solving Equation 2. For example, the AD565/
AD744 circuit of Figure 34 constrains all the variables of Equa-
tion 2 (GN = 3.25, R = 10 k
, FO = 13 MHz, and CX = 32.5 pF)
Therefore, under these conditions, CL= 10.5 pF.
VALUE OF RESISTOR –
100
VALUE
OF
CAPACITOR
C
LEAD
–
pF
35
0
1k
10k
100k
30
25
20
15
10
5
IN THIS REGION
CLEAD = 0pF
GN = 1 TO
GN = 1.5
GN = 2
GN = 3
GN = 1
Figure 41. Practical Values of CL vs. Resistance of R
for Various Amplifier Noise Gains
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
TO-99 (H) Package
5
4
0.034 (0.86)
0.028 (0.71)
0.045 (1.1)
0.020 (0.51)
BOTTOM VIEW
6
2
8
7
3
1
0.2 (5.1) TYP
45°
EQUALLY
SPACED
0.185 (4.70)
0.165 (4.19)
REFERENCE PLANE
0.5 (12.70)
MIN
0.019 (0.48)
0.016 (0.41)
DIA
8 LEADS
0.04 (1.0) MAX
SEATING PLANE
0.335 (8.50)
0.305 (7.75)
0.370 (9.40)
0.335 (8.50)
INSULATION
0.05 (1.27) MAX
Mini-DIP (N) Package
0.39 (9.91)
MAX
8
14
5
PIN 1
0.10 (2.54)
TYP
0.25
(6.35)
0.31
(7.87)
SEATING
PLANE
0.125 (3.18)
MIN
0.165
0.01
(4.19
0.25)
0.035
0.01
(0.89
0.25)
0.18
0.03
(4.57
0.76)
0.018
0.003
(0.46
0.08)
0.033
(0.84)
NOM
0.30 (7.62)
REF
0-15
0.011
0.003
(0.28
0.08)
Cerdip (Q) Package
1
4
85
0.310 (7.87)
0.220 (5.59)
PIN 1
0.005 (0.13)
MIN
0.055 (1.35)
MAX
0.1 (2.54) BSC
15°
0°
0.32 (8.13)
0.29 (7.37)
0.015 (0.38)
0.008 (0.20)
SEATING
PLANE
0.20 (5.08)
MAX
0.405 (10.29) MAX
0.15
(3.81)
MIN
0.200 (5.08)
0.125 (3.18)
0.023 (0.58)
0.014 (0.36)
0.07 (1.78)
0.03 (0.76)
0.06 (1.52)
0.015 (0.38)
Small Outline (SO-8) Package
0.011
0.002
(0.269
0.03)
0.033
0.017
(0.83
0.43)
SEATING
PLANE
0.008
0.004
(0.203
0.075)
0.098
0.006
(2.49
0.23)
0.017
0.003
(0.42
0.07)
85
4
1
PIN 1
0.050 (1.27)
BSC
0.193
0.008
(4.90
0.10)
0.154
0.004
(3.91
0.10)
0.236
0.012
(6.00
0.20)
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