參數(shù)資料
型號(hào): AD7414ARM-3REEL7
廠商: ANALOG DEVICES INC
元件分類: 溫度/濕度傳感器
英文描述: DIGITAL TEMP SENSOR-SERIAL, 10BIT(s), 2Cel, SQUARE, SURFACE MOUNT
封裝: MICRO, SOIC-8
文件頁(yè)數(shù): 11/12頁(yè)
文件大?。?/td> 182K
代理商: AD7414ARM-3REEL7
AD7414
–8–
REV. PrB
Preliminary Technical Data
PRELIMINAR
Y
TECHNICAL
DA
TA
sions, up to eight AD7414’s can be connected to a single,
serial bus, or the addresses can be set to avoid conflicts
with other devices on the bus.
The serial bus protocol operates as follows:
1. The master initiates data transfer by establishing a
START condition, defined as a high to low transition
on the serial data line SDA whilst the serial clock line
SCL remains high. This indicates that an address/data
stream will follow. All slave peripherals connected to
the serial bus respond to the START condition, and
shift in the next 8 bits, consisting of a 7-bit address
(MSB first) plus a R/
W bit, which determines the direc-
tion of the data transfer, i.e. whether data will be writ-
ten to or read from the slave device.
The peripheral whose address corresponds to the trans-
mitted address responds by pulling the data line low
during the low period before the ninth clock pulse,
known as the Acknowledge Bit. All other devices on the
bus now remain idle whilst the selected device waits for
data to be read from or written to it. If the R/
W bit is a
0 then the master will write to the slave device. If the
R/
W bit is a 1 the master will read from the slave de-
vice.
2. Data is sent over the serial bus in sequences of 9 clock
pulses, 8 bits of data followed by an Acknowledge Bit
from the receiver of data. Transitions on the data line
must occur during the low period of the clock signal
and remain stable during the high period, as a low to
high transition when the clock is high may be inter-
preted as a STOP signal.
3. When all data bytes have been read or written, stop
conditions are established. In WRITE mode, the master
will pull the data line high during the 10th clock pulse
to assert a STOP condition. In READ mode, the mas-
ter device will pull the data line high during the low
period before the 9th clock pulse. This is known as No
Acknowledge. The master will then take the data line
low during the low period before the 10th clock pulse,
then high during the 10th clock pulse to assert a STOP
condition.
Any number of bytes of data may be transferred over the
serial bus in one operation, but it is not possible to mix
read and write in one operation, because the type of opera-
R/
W
1
SCL
SDA
00
1
A 2
A 1
A 0
P7
P6
P5
P4
P3
P2
P1
P0
ACK. BY
AD7414
STOP BY
MA STE R
START BY
MA STE R
FRAM E 1
SERIA L BUS ADDRESS BYTE
FRAM E 2
ADDRESS POINTER RE G ISTER BYTE
19
1
ACK. BY
AD7414
9
Figure 5. Writing to the Address Pointer Register to select
a register for a subsequent Read operation
R/
W
1
SCL
SDA
00
1
A2
A1
A0
P7
P6
P5
P 4
P3
P2
P1
P 0
ACK. BY
AD7414
START BY
MA STE R
FRAM E 1
SERIA L BUS ADDRESS BYTE
FRAM E 2
ADDRESS POINTE R RE G ISTER BYTE
19
1
ACK. BY
AD7414
9
D7
D6
D5
D 4
D3
D2
D1
D0
ACK. BY
AD7414
STOP BY
MA STE R
FRAM E 3
DA TA B YTE
19
SCL (CO NTINUED)
SDA (CO NTI NUED)
Figure 6. Writing to the Address Pointer Register followed
by a single byte of data to the selected register
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