
REV. 0
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reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
AD7398/AD7399
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 2000
Quad, Serial-Input
12-Bit/10-Bit DACs
FUNCTIONAL BLOCK DIAGRAM
CLK
GND
V
DD
CS
SDI
DAC A
REGISTER
DAC A
INPUT
REG A
INPUT
REG B
INPUT
REG C
INPUT
REG D
SERIAL
REGISTER
POWER
ON RESET
DAC B
REGISTER
DAC C
REGISTER
DAC D
REGISTER
DAC D
DAC C
DAC B
V
OUT
A
V
OUT
B
V
OUT
C
V
OUT
D
V
REF
A
V
REF
B
V
REF
C V
REF
D
LDAC
RS
V
SS
12/10
FEATURES
AD7398—12-Bit Resolution
AD7399—10-Bit Resolution
Programmable Power Shutdown
Single (3 V to 5 V) or Dual ( 5 V) Supply Operation
3-Wire Serial SPI-Compatible Interface
Internal Power ON Reset
Double Buffered Registers for Simultaneous
Multichannel DAC Update
Four Separate Rail-to-Rail Reference Inputs
Thin Profile TSSOP-16 Package Available
Low Tempco 1.5 ppm/ C
APPLICATIONS
Automotive Output Voltage Span
Portable Communications
Digitally Controlled Calibration
PC Peripherals
GENERAL DESCRIPTION
The AD7398/AD7399 family of quad, 12-bit/10-bit, voltage-
output digital-to-analog converters is designed to operate from a
single 3 V to 5 V or a dual
±
5 V supply. Built with Analog’s robust
CBCMOS process, this monolithic DAC offers the user low
cost, and ease-of-use in single or dual-supply systems.
The applied external reference V
REF
determines the full-scale
output voltage. Valid V
REF
values include V
SS
< V
REF
< V
DD
that
result in a wide selection of full-scale outputs. For multiplying
applications ac inputs can be as large as
±
5 V
P
.
A doubled-buffered serial-data interface offers high-speed,
3-wire, SPI and microcontroller-compatible inputs using serial-
data-in (SDI), clock (CLK), and a chip-select (
CS
). A common
level-sensitive load-DAC strobe (
LDAC
) input allows simulta-
neous update of all DAC outputs from previously loaded Input
Registers. Additionally, an internal power ON reset forces the
output voltage to zero at system turn ON. An external asynchro-
nous reset (
RS
) also forces all registers to the zero code state. A
programmable power-shutdown feature reduces power dissipa-
tion on unused DACs.
Both parts are offered in the same pinout to enable users to
select the appropriate resolution for their application without
redesigning the layout. For 8-bit resolution applications see the
pin compatible AD7304 product.
The AD7398/AD7399 is specified over the extended industrial
(–40
°
C to +125
°
C) temperature range. Parts are available in
wide body SOIC-16 and ultracompact thin 1.1 mm TSSOP-
16 packages.
CODE – Decimal
–0.50
0
512
D
0
–0.40
–0.30
–0.20
–0.10
0.10
0.20
0.30
0.40
0.50
1024
1536
2048
2560
3072
3584
4096
V
DD
= +5V
V
SS
= –5V
V
REF
= +2.5V
T
A
= 25 C
Figure 1. AD7398 DNL vs. Code (T
A
= 25
°
C)