- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄375236 > AD7339BS (ANALOG DEVICES INC) 5 V Integrated High Speed ADC/Quad DAC System PDF資料下載
參數(shù)資料
| 型號(hào)： | AD7339BS |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號(hào)調(diào)理 |
| 英文描述： | 5 V Integrated High Speed ADC/Quad DAC System |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PQFP52 |
| 封裝： | PLASTIC, QFP-52 |
| 文件頁(yè)數(shù)： | 7/12頁(yè) |
| 文件大?。?/td> | 179K |
| 代理商： | AD7339BS |
AD7339
–7–
REV. 0
PIN FUNCTION DESCRIPTIONS
Pin Number
Mnemonic
Function
Power Supply
33
2
12
36
22
29
21
28
32
34
ADCs
31
AVDD
DVDD1
DGND1
AGND1
DVDD2
DVDD3
DGND2
DGND3
AGND2
AGND3
Analog power supply connection.
Digital power supply for the parallel DACs.
Digital ground connection for the parallel DACs.
Analog ground connection for the parallel DACs.
Digital power supply for the ADC.
Digital power supply for the ADC.
Digital ground connection for the ADC.
Digital ground connection for the ADC.
Analog ground connection for the ADC.
Analog ground connection for the reference.
AIN
Analog input to the ADC. The analog input must be appropriately ac coupled.
The AD7339 can accept an analog input of
±
1 V maximum.
ADC Input Clock, CMOS Logic Input. The analog input is sampled on the rising edge
of ADCCLK. ADCCLK is nominally set to 2.048 MHz.
Digital Output from the ADC. The 8-bit digital word from the ADC is in offset binary.
The digital output uses CMOS logic.
Digital Input. When ADCPDB is low, the ADC is powered down. While in this mode,
ADCCLK should be tied low. The ADC is powered up by taking ADCPDB high.
27
ADCCLK
26–23, 20–17
D0–D7
30
ADCPDB
Parallel DACs
45–52
DA0–DA7
Digital input to the parallel A DAC. The digital input uses CMOS logic and the word
is presented to the DAC in offset binary format.
Digital input to the parallel B DAC. The digital input uses CMOS logic and the word
is presented to the DAC in offset binary format.
Input clock to the parallel DACs. The digital words in the A and B DAC registers are
loaded into the DACs on the rising edge of DACCLK. DACCLK has a nominal fre-
quency of 2.304 MHz and uses CMOS logic.
Analog outputs from the A and B DACs. Both DACs have an analog output of VREFA/
VREFB
±
X volts where VREFA = VREFB = 2.5 V nominal and X = 1.4 V.
3–10
DB0–DB7
1
DACCLK
43, 41
DACA, DACB
PIN CONFIGURATION
14 15 16 17 18 19 20 21 22 23 24 25 26
S
1
2
3
4
5
6
7
8
9
10
11
13
12
52 51 50 49 48
43 42 41 40
47 46 45 44
39
38
37
36
35
34
33
32
31
30
29
28
27
PIN 1
TOP VIEW
(Not to Scale)
D
D
D
D
D
D
D
D
V
D
V
D
S
DACCLK
DVDD1
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DACPDB
DGND1
SDACPDB
SDAC1F
SDAC0S
SDAC0F
AGND1
VREF
AGND3
AVDD
AGND
AIN
ADCPDB
DVDD3
DGND3
ADCCLK
L
S
D
D
D
D
D
D
D
D
D
D
AD7339
2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD7339 | 5 V Integrated High Speed ADC/Quad DAC System(高速8位A/D轉(zhuǎn)換器/四路8位D/A轉(zhuǎn)換器) |
| AD734 | 10 MHz, 4-Quadrant Multiplier/Divider(10MHz,四象限乘法器/除法器) |
| AD73511 | Low-Power CMOS Analog Front End with Flash based DSP Microcomputer(帶閃速DSP微計(jì)算機(jī)的單模擬前端) |
| AD7392 | Parallel Input Micropower 10- and 12-Bit DACs(并行輸入微功耗12位D/A轉(zhuǎn)換器) |
| AD7395 | +3 V, Dual, Serial Input 12-/10-Bit DACs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7339BS-REEL | 制造商:Analog Devices 功能描述:Data Acquisition System Single ADC Quad DAC 8-Bit 52-Pin MQFP T/R |
| AD7339BSZ-REEL | 功能描述:IC ADC/QUAD DAC 5V W/REF 52-MQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 類型:數(shù)據(jù)采集系統(tǒng)（DAS） 分辨率（位）:16 b 采樣率（每秒）:21.94k 數(shù)據(jù)接口:MICROWIRE?，QSPI?，串行，SPI? 電壓電源:模擬和數(shù)字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN-EP（6x6） 包裝:托盤 |
| AD734 | 制造商:AD 制造商全稱:Analog Devices 功能描述:10 MHz, 4-Quadrant Multiplier/Divider |
| AD73411 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low-Power Analog Front End with DSP Microcomputer |
| AD73411BB-40 | 制造商:Analog Devices 功能描述:Audio Codec 1ADC / 1DAC 16-Bit 119-Pin BGA 制造商:Rochester Electronics LLC 功能描述:ANALOG FRONT-END PROCESSOR +DSP I.C. - Bulk |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。