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參數(shù)資料
| 型號： | AD7322BRU |
| 廠商： | Atmel Corp. |
| 英文描述： | Software Selectable True Bipolar Input, 2-Channel, 12-Bit Plus Sign ADC |
| 中文描述： | 軟件可選真雙極性輸入，2通道，12位ADC的加號 |
| 文件頁數(shù)： | 17/18頁 |
| 文件大?。?/td> | 901K |
| 代理商： | AD7322BRU |
AD7322
Preliminary Technical Data
TERMINOLOGY
Differential Nonlinearity
This is the difference between the measured and the ideal 1 LSB
change between any two adjacent codes in the ADC.
Integral Nonlinearity
This is the maximum deviation from a straight line passing
through the endpoints of the ADC transfer function. The
endpoints of the transfer function are zero scale, a point 1 LSB
below the first code transition, and full scale, a point 1 LSB
above the last code transition.
Offset Code Error
This applies to Straight Binary output coding. It is the deviation
of the first code transition (00 . . . 000) to (00 . . . 001) from the
ideal, i.e., AGND + 1 LSB.
Offset Error Match
This is the difference in Offset Error between any two input
channels.
Gain Error
This applies to Straight Binary output coding. It is the deviation
of the last code transition (111 . . . 110) to (111 . . . 111) from the
ideal (i.e., 4 x VRef – 1 LSB, 2 x VREF –1 LSB, VREF –1 LSB) after
the offset error has been adjusted out.
Gain Error Match
This is the difference in Gain Error between any two input
channels channels.
Bipolar Zero Code Error
This applies when using twos complement output coding and a
bipolar Analog Input. It is the deviation of the midscale
transition (all 1s to all 0s) from the ideal VIN voltage, i.e., AGND
- 1 LSB.
Bipolar Zero Code Error Match
This refers to the difference in Bipolar Zero Code Error
between any two input channels.
Positive Full Scale Error
This applies when using twos complement output coding and
any of the bipolar Analog Input ranges. It is the deviation of the
last code transition (011…110) to (011…111) from the ideal (
+4 x VREF - 1 LSB, + 2 x VREF – 1 LSB, + VREF – 1 LSB) after the
bipolar Zero Code Error has been adjusted out.
Positive Full Scale Error Match
This is the difference in Positive Full Scale error between any
two input channels.
Negative Full Scale Error
This applies when using twos complement output coding and
any of the bipolar Analog Input ranges. This is the deviation of
the first code transition (10…000) to (10…001) from the ideal
(i.e., - 4 x VREF + 1 LSB, - 2 x VREF + 1 LSB, - VREF + 1 LSB) after
the Bipolar Zero Code Error has been adjusted out.
Negative Full Scale Error Match
This is the difference in Negative Full Scale error between any
two input channels.
Track-and-Hold Acquisition Time
The track-and-hold amplifier returns into track mode after the
fifteenth SCLK falling edge. Track-and-hold acquisition time is
the time required for the output of the track-and-hold amplifier
to reach its final value, within ±1/2 LSB, after the end of
conversion.
Signal to (Noise + Distortion) Ratio
This is the measured ratio of signal to (noise + distortion) at the
output of the A/D converter. The signal is the rms amplitude of
the fundamental. Noise is the sum of all non-fundamental
signals up to half the sampling frequency (fS/2), excluding dc.
The ratio is dependent on the number of quantization levels in
the digitization process; the more levels, the smaller the
quantization noise. The theoretical signal to (noise + distortion)
ratio for an ideal N-bit converter with a sine wave input is given
by:
Signal to (Noise + Distortion) = (6.02N + 1.76) dB
Thus for a 13-bit converter, this is 80.02 dB.
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the rms sum of
harmonics to the fundamental. For the AD7322 it is defined as:
1
2
6
2
5
2
4
2
3
2
log
20
)
(
V
dB
THD
+
=
where V1 is the rms amplitude of the fundamental and V2, V3,
V4, V5 and V6 are the rms amplitudes of the second through the
sixth harmonics.
Peak Harmonic or Spurious Noise
Peak harmonic or spurious noise is defined as the ratio of the
rms value of the next largest component in the ADC output
spectrum (up to fS/2 and excluding dc) to the rms value of the
fundamental. Normally, the value of this specification is
determined by the largest harmonic in the spectrum, but for
ADCs where the harmonics are buried in the noise floor, it will
be a noise peak.
Channel-to-Channel Isolation
Channel-to-channel isolation is a measure of the level of
crosstalk between any two channels. It is measured by applying
a full-scale, 400 kHz sine wave signal to all unselected input
channels and determining how much that signal is attenuated in
Rev. PrE | Page 8 of 18
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| AD7322BRUZ | 功能描述:IC ADC 12BIT+ SAR 2CHAN 14TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應商設備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個單端，單極 產(chǎn)品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
| AD7322BRUZ-REEL | 功能描述:IC ADC 12BIT+SAR 2CHAN 14-TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個單端，單極 |
| AD7322BRUZ-REEL7 | 功能描述:IC ADC 12BIT+ SAR 2CHAN 14TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個單端，單極 |
| AD7322LYRU | 制造商:Analog Devices 功能描述: |
| AD7323 | 制造商:AD 制造商全稱:Analog Devices 功能描述:500 kSPS, 4-Channel, Software-Selectable, True Bipolar Input, 12-Bit Plus Sign ADC |
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