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參數(shù)資料
| 型號(hào)： | AD7228ABQ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | LC2MOS Octal 8-Bit DAC |
| 中文描述： | OCTAL, PARALLEL, 8 BITS INPUT LOADING, 8-BIT DAC, CDIP24 |
| 封裝： | SKINNY, CERDIP-24 |
| 文件頁數(shù)： | 4/8頁 |
| 文件大?。?/td> | 207K |
| 代理商： | AD7228ABQ |
AD7228A
REV. A
–4–
ABSOLUT E MAX IMUM RAT INGS
1
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V, +17 V
V
DD
to V
SS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V, +24 V
Digital Input Voltage to GND . . . . . . . . . . . . . . . –0.3 V, V
DD
V
REF
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V, V
DD
V
OUT
to GND
2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
SS
, V
DD
Power Dissipation (Any Package) to +75
°
C . . . . . . . 1000 mW
Derates above 75
°
C by . . . . . . . . . . . . . . . . . . . . 2.0 mW/
°
C
Operating T emperature
Commercial . . . . . . . . . . . . . . . . . . . . . . . . –40
°
C to +85
°
C
Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . –40
°
C to +85
°
C
Extended . . . . . . . . . . . . . . . . . . . . . . . . . –55
°
C to +125
°
C
Storage T emperature . . . . . . . . . . . . . . . . . . –65
°
C to +150
°
C
Lead T emperature (Soldering, 10 secs) . . . . . . . . . . . +300
°
C
NOT ES
1
Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. T his is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2
Outputs may be shorted to any voltage in the range V
to V
provided that the
power dissipation of the package is not exceeded. T ypical short circuit current for
a short to GND or V
SS
is 50 mA.
WARNING!
ESD SENSITIVE DEVICE
C AUT ION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7228A features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. T herefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
PIN CONFIGURAT IONS
DIP AND SOIC
PLC C
ORDE RING GUIDE
T otal
Unadjusted
E rror (LSB)
T emperature
Range
Package
Option
2
Model
1
AD7228ABN
AD7228ACN
AD7228ABP
AD7228ACP
AD7228ABR
AD7228ACR
AD7228ABQ
AD7228ACQ
AD7228AT Q
3
AD7228AUQ
3
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–55
°
C to +125
°
C
–55
°
C to +125
°
C
±
2 max
±
1 max
±
2 max
±
1 max
±
2 max
±
1 max
±
2 max
±
1 max
±
2 max
±
1 max
N-24
N-24
P-28A
P-28A
R-24
R-24
Q-24
Q-24
Q-24
Q-24
NOT ES
1
T o order MIL-ST D-883, Class B processed parts, add /883B to part number.
Contact your local sales office for military data sheet and availability.
2
N = Plastic DIP; P = Plastic Leaded Chip Carrier (PLCC); Q = Cerdip;
R = Small Outline IC (SOIC).
3
T hese grades will be available to /883B processing only.
CIRCUIT INFORMAT ION
D/A SE CT ION
T he AD7228A contains eight identical, 8-bit, voltage-mode
digital-to-analog converters. T he output voltages from the con-
verters have the same polarity as the reference voltage, allowing
single supply operation. A novel DAC switch pair arrangement
on the AD7228A allows a reference voltage range from +2 V to
+10 V when operated from a V
DD
of +15 V. Each DAC consists
of a highly stable, thin-film, R-2R ladder and eight high-speed
NMOS switches. T he simplified circuit diagram for one channel
is shown in Figure 3. Note that V
REF
and GND are common to
all eight DACs.
Figure 3. D/A Simplified Circuit Diagram
T he input impedance at the V
REF
pin of the AD7228A is the
parallel combination of the eight individual DAC reference in-
put impedances. It is code dependent and can vary from 2 k
to
infinity. T he lowest input impedance occurs when all eight
DACs are loaded with digital code 01010101. T herefore, it is
important that the external reference source presents a low out-
put impedance to the V
REF
terminal of the AD7228A under
changing load conditions. Due to transient currents at the refer-
ence input during digital code changes a 0.1
μ
F (or greater)
decoupling capacitor is recommended on the V
REF
input for dc
applications. T he nodal capacitance at the reference terminal is
also code dependent and typically varies from 120 pF to
350 pF.
Each V
OUT
pin can be considered as a digitally programmable
voltage source with an output voltage:
V
OUTN
= D
N
V
REF
where
D
N
is a fractional representation of the digital input
code and can vary from 0 to 255/256.
T he output impedance is that of the output buffer amplifier as
described in the following section.
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| AD7228ACP | LC2MOS Octal 8-Bit DAC |
| AD7228ACQ | LC2MOS Octal 8-Bit DAC |
| AD7228ACR | CAP 2200PF 400V CER DISC X1 RATED |
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