參數(shù)資料
型號: AD7226KR
廠商: ANALOG DEVICES INC
元件分類: DAC
英文描述: LC2MOS Quad 8-Bit D/A Converter
中文描述: PARALLEL, 8 BITS INPUT LOADING, 3 us SETTLING TIME, 8-BIT DAC, PDSO20
封裝: MS-013AC, SOIC-20
文件頁數(shù): 6/12頁
文件大?。?/td> 247K
代理商: AD7226KR
AD7226
REV. A
–6–
INT E RFACE LOGIC INFORMAT ION
Address lines A0 and A1 select which DAC will accept data
from the input port. T able I shows the selection table for the
four DACs with Figure 4 showing the input control logic. When
the
WR
signal is LOW, the input latches of the selected DAC
are transparent and its output responds to activity on the data
bus. T he data is latched into the addressed DAC latch on the
rising edge of
WR
. While
WR
is high the analog outputs remain
at the value corresponding to the data held in their respective
latches.
T able I. AD7226 T ruth T able
AD7226 Control Inputs
WR
A1
AD7226
Operation
A0
H
L
g
L
g
L
g
L
g
X
L
L
L
L
H
H
H
H
X
L
L
H
H
L
L
H
H
No Operation Device Not Selected
DAC A T ransparent
DAC A Latched
DAC B T ransparent
DAC B Latched
DAC C T ransparent
DAC C Latched
DAC D T ransparent
DAC D Latched
L = Low State, H = High State, X = Don’t Care
Figure 4. Input Control Logic
Figure 5. Write Cycle Timing Diagram
Typical Performance Characteristics
(T
A
= 25
8
C, V
DD
= +15 V, V
SS
= –5 V)
Figure 6. Channel-to-Channel Matching
Figure 7. Relative Accuracy vs. V
REF
Figure 8. Differential Nonlinearity vs. V
REF
相關(guān)PDF資料
PDF描述
AD7226TQ LC2MOS Quad 8-Bit D/A Converter
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