參數(shù)資料
型號： AD7224LR-1
廠商： ANALOG DEVICES INC
元件分類： DAC
英文描述： LC2MOS 8-Bit DAC with Output Amplifiers
中文描述： PARALLEL, 8 BITS INPUT LOADING, 8-BIT DAC, PDSO20
封裝： SOIC-20
文件頁數(shù)： 3/8頁
文件大?。?/td> 228K
代理商： AD7224LR-1
AD7224
REV. B
–3–
SINGLE SUPPLY
K, B, T
Versions
2
L, C, U
Versions
2
Parameter
Units
Conditions/Comments
ST AT IC PERFORMANCE
Resolution
T otal Unadjusted Error
Differential Nonlinearity
8
±
2
±
1
8
±
2
±
1
Bits
LSB max
LSB max
Guaranteed Monotonic
REFERENCE INPUT
Input Resistance
Input Capacitance
3
8
100
8
100
k
min
pF max
Occurs when DAC is loaded with all 1s.
DIGIT AL INPUT S
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Leakage Current
Input Capacitance
Input Coding
2.4
0.8
±
1
8
Binary
2.4
0.8
±
1
8
Binary
V min
V max
μ
A max
pF max
V
IN
= 0 V or V
DD
DYNAMIC PERFORMANCE
Voltage Output Slew Rate
4
Voltage Output Settling T ime
4
Positive Full-Scale Change
Negative Full-Scale Change
Digital Feedthrough
3
Minimum Load Resistance
2
2
V/
μ
s min
5
20
50
2
5
20
50
2
μ
s max
μ
s max
nV secs typ
k
min
Settling T ime to
±
1/2 LSB
Settling T ime to
±
1/2 LSB
V
REF
= 0 V
V
OUT
= +10 V
POWER SUPPLIES
V
DD
Range
I
DD
@ 25
°
C
T
MIN
to T
MAX
SWIT CHING CHARACT ERIST ICS
3, 4
t
1
@ 25
°
C
T
MIN
to T
MAX
t
2
@ 25
°
C
T
MIN
to T
MAX
t
3
@ 25
°
C
T
MIN
to T
MAX
t
4
@ 25
°
C
T
MIN
to T
MAX
t
5
@ 25
°
C
T
MIN
to T
MAX
t
6
@ 25
°
C
T
MIN
to T
MAX
14.25/15.75
14.25/15.75
V min/V max
For Specified Performance
4
6
4
6
mA max
mA max
Outputs Unloaded; V
IN
= V
INL
or V
INH
Outputs Unloaded; V
IN
= V
INL
or V
INH
90
90
90
90
ns min
ns min
Chip Select/Load DAC Pulse Width
90
90
90
90
ns min
ns min
Write/Reset Pulse Width
0
0
0
0
ns min
ns min
Chip Select/Load DAC to Write Setup T ime
0
0
0
0
ns min
ns min
Chip Select/Load DAC to Write Hold T ime
90
90
90
90
ns min
ns min
Data Valid to Write Setup T ime
10
10
10
10
ns min
ns min
Data Valid to Write Hold T ime
NOT ES
1
Maximum possible reference voltage.
2
T emperature ranges are as follows:
AD7224K N, LN: 0
°
C to +70
°
C
AD7224BQ, CQ: –25
°
C to +85
°
C
AD7224T D, UD: –55
°
C to +125
°
C
3
See T erminology.
4
Sample tested at 25
°
C by Product Assurance to ensure compliance.
Specifications subject to change without notice.
(V
DD
= +15 V
6
5%; V
SS
= AGND = DGND = OV; V
REF
= +10 V
1
unless otherwse noted.
All specifications T
MN
to T
MAX
unless otherwse noted.)
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