參數(shù)資料
型號(hào)： AD7224KP
廠商： ANALOG DEVICES INC
元件分類(lèi)： DAC
英文描述： ECONOLINE: REC2.2-S_DRW(Z)/H* - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- 4.5-9V, 9-18V, 18-36V, 36-72V Wide Input Range 2 : 1- UL94V-0 Package Material- Continuous Short Circiut Protection- Cost Effective- 100% Burned In- Efficiency to 84%
中文描述： PARALLEL, 8 BITS INPUT LOADING, 8-BIT DAC, PQCC20
封裝： PLASTIC, LCC-20
文件頁(yè)數(shù)： 2/8頁(yè)
文件大?。?/td> 228K
代理商： AD7224KP
REV. B
–2–
AD7224–SPECIFICATIONS
(V
DD
= 11.4 V to 16.5 V, V
SS
= –5 V
6
10%; AGND = DGND = OV; V
REF
= +2 V to (V
DD
– 4 V)
1
unless otherwse noted.
All specifications T
MN
to T
MAX
unless otherwse noted.)
DUAL SUPPLY
K, B, T
Versions
2
L, C, U
Versions
2
Parameter
Units
Conditions/Comments
ST AT IC PERFORMANCE
Resolution
T otal Unadjusted Error
Relative Accuracy
Differential Nonlinearity
Full-Scale Error
Full-Scale T emperature Coefficient
Zero Code Error
Zero Code Error T emperature Coefficient
8
±
2
±
1
±
1
±
3/2
±
20
±
30
±
50
8
±
1
±
1/2
±
1
±
1
±
20
±
20
±
30
Bits
LSB max
LSB max
LSB max
LSB max
ppm/
°
C max
mV max
μ
V/
°
C typ
V
DD
= +15 V
±
5%, V
REF
= +10 V
Guaranteed Monotonic
V
DD
= 14 V to 16.5 V, V
REF
= +10 V
REFERENCE INPUT
Voltage Range
Input Resistance
Input Capacitance
3
2 to (V
DD
– 4)
8
100
2 to (V
DD
– 4)
8
100
V min to V max
k
min
pF max
Occurs when DAC is loaded with all 1s.
DIGIT AL INPUT S
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Leakage Current
Input Capacitance
Input Coding
2.4
0.8
±
1
8
Binary
2.4
0.8
±
1
8
Binary
V min
V max
μ
A max
pF max
V
IN
= 0 V or V
DD
DYNAMIC PERFORMANCE
Voltage Output Slew Rate
3
Voltage Output Settling T ime
3
Positive Full-Scale Change
Negative Full-Scale Change
Digital Feedthrough
Minimum Load Resistance
2.5
2.5
V/
μ
s min
5
7
50
2
5
7
50
2
μ
s max
μ
s max
nV secs typ
k
min
V
REF
= +10 V; Settling T ime to
±
1/2 LSB
V
REF
= +10 V; Settling T ime to
±
1/2 LSB
V
REF
= 0 V
V
OUT
= +10 V
POWER SUPPLIES
V
DD
Range
V
SS
Range
I
DD
@ 25
°
C
T
MIN
to T
MAX
I
SS
@ 25
°
C
T
MIN
to T
MAX
SWIT CHING CHARACT ERIST ICS
3, 4
t
1
@ 25
°
C
T
MIN
to T
MAX
t
2
@ 25
°
C
T
MIN
to T
MAX
t
3
@ 25
°
C
T
MIN
to T
MAX
t
4
@ 25
°
C
T
MIN
to T
MAX
t
5
@ 25
°
C
T
MIN
to T
MAX
t
6
@ 25
°
C
T
MIN
to T
MAX
11.4/16.5
4.5/5.5
11.4/16.5
4.5/5.5
V min/V max
V min/V max
For Specified Performance
For Specified Performance
4
6
4
6
mA max
mA max
Outputs Unloaded; V
IN
= V
INL
or V
INH
Outputs Unloaded; V
IN
= V
INL
or V
INH
3
5
3
5
mA max
mA max
Outputs Unloaded; V
IN
= V
INL
or V
INH
Outputs Unloaded; V
IN
= V
INL
or V
INH
90
90
90
90
ns min
ns min
Chip Select/Load DAC Pulse Width
90
90
90
90
ns min
ns min
Write/Reset Pulse Width
0
0
0
0
ns min
ns min
Chip Select/Load DAC to Write Setup T ime
0
0
0
0
ns min
ns min
Chip Select/Load DAC to Write Hold T ime
90
90
90
90
ns min
ns min
Data Valid to Write Setup T ime
10
10
10
10
ns min
ns min
Data Valid to Write Hold T ime
NOT ES
1
Maximum possible reference voltage.
2
T emperature ranges are as follows:
K , L Versions: –40
°
C to +85
°
C
B, C Versions: –40
°
C to +85
°
C
T , U Versions: –55
°
C to +125
°
C
3
Sample T ested at 25
°
C by Product Assurance to ensure compliance.
4
Switching characteristics apply for single and dual supply operation.
Specifications subject to change without notice.
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