參數(shù)資料
型號(hào)： AD711AQ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 14/16頁(yè)
文件大?。?/td> 0K
描述： IC OPAMP BIFET PREC 25MA 8CDIP
產(chǎn)品培訓(xùn)模塊： Op Amp Basics
標(biāo)準(zhǔn)包裝： 48
放大器類型： J-FET
電路數(shù)： 1
轉(zhuǎn)換速率： 20 V/µs
-3db帶寬： 4MHz
電流 - 輸入偏壓： 15pA
電壓 - 輸入偏移： 300µV
電流 - 電源： 2.5mA
電流 - 輸出 / 通道： 25mA
電壓 - 電源，單路/雙路(±)： 9 V ~ 36 V，±4.5 V ~ 18 V
工作溫度： -40°C ~ 85°C
安裝類型： 通孔
封裝/外殼： 8-CDIP（0.300"，7.62mm）
供應(yīng)商設(shè)備封裝： 8-CERDIP
包裝： 管件
產(chǎn)品目錄頁(yè)面： 773 (CN2011-ZH PDF)
REV. E
AD711
–7–
OPTIMIZING SETTLING TIME
Most bipolar high-speed D/A converters have current outputs;
therefore, for most applications, an external op amp is required
for current-to-voltage conversion. The settling time of the
converter/op amp combination depends on the settling time of
the DAC and output amplifier. A good approximation is:
t
S Total
= (t
S DAC )
2
+(t
S AMP )
2
(1)
The settling time of an op amp DAC buffer will vary with the
noise gain of the circuit, the DAC output capacitance, and with
the amount of external compensation capacitance across the
DAC output scaling resistor.
Settling time for a bipolar DAC is typically 100 ns to 500 ns.
Previously, conventional op amps have required much longer
settling times than have typical state-of-the-art DACs; therefore,
the amplifier settling time has been the major limitation to a
high-speed voltage-output D-to-A function. The introduction
of the AD711/712 family of op amps with their 1
ms (to ±0.01%
of final value) settling time now permits the full high-speed
capabilities of most modern DACs to be realized.
In addition to a significant improvement in settling time, the
low offset voltage, low offset voltage drift, and high open-loop
gain of the AD711 family assures 12-bit accuracy over the full
operating temperature range.
The excellent high-speed performance of the AD711 is shown
in the oscilloscope photos of Figure 2. Measurements were taken
using a low input capacitance amplifier connected directly to the
summing junction of the AD711 – both photos show the worst
case situation: a full-scale input transition. The DAC’s 4 k
W
[10 k
W 8 kW = 4.4 kW] output impedance together with a 10 kW
feedback resistor produce an op amp noise gain of 3.25. The
current output from the DAC produces a 10 V step at the op
amp output (0 to –10 V Figure 2a, –10 V to 0 V Figure 2b.)
Therefore, with an ideal op amp, settling to
±1/2 LSB (±0.01%)
requires that 375
mV or less appears at the summing junction.
This means that the error between the input and output (that
voltage which appears at the AD711 summing junction) must
be less than 375
mV. As shown in Figure 2, the total settling time
for the AD711/AD565 combination is 1.2 microseconds.
OUTPUT
–10V TO +10V
+15V
0.1 F
10pF
0.1 F
AD711K
DAC
IOUT = 4
IREF
CODE
0.5mA
IREF
20k
19.95k
R1
100
BIPOLAR
OFFSET ADJUST
IO
DAC
OUT
10V
SPAN
–15V
20V
SPAN
5k
10V
MSB
LSB
REF
OUT
VCC
REF
IN
REF
GND
R2
100
GAIN
ADJUST
0.1 F
AD565A
BIPOLAR
OFF
9.95k
–VEE
0.1 F
POWER
GND
Figure 1.
±10 V Voltage Output Bipolar DAC
Figure 2. Settling Characteristics for AD711 with AD565A
a. (Full-Scale Negative Transition)
b. (Full-Scale Positive Transition)
相關(guān)PDF資料
PDF描述
929836-01-10-RK CONN HEADER 20POS DUAL .100 TIN
9-103329-0-15 CONN HEADR BRKWAY .100 15POS R/A
929834-04-13-RK CONN HEADER .100 SNGL STR 13POS
929834-02-23-RK CONN HEADER .100 SNGL STR 23POS
929400-01-23-RK CONN HEADER .100 SNGL STR 23POS
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD711BH 制造商:Rochester Electronics LLC 功能描述:HIGH SPEED BIFET OP AMP - Bulk
AD711BQ 制造商:Rochester Electronics LLC 功能描述:HIGH SPEED BIFET OP AMP - Bulk
AD711CH 制造商:AD 制造商全稱:Analog Devices 功能描述:Precision, Low Cost, High Speed, BiFET Op Amp
AD711CQ 制造商:AD 制造商全稱:Analog Devices 功能描述:Precision, Low Cost, High Speed, BiFET Op Amp
AD711CQ/+ 制造商:Analog Devices 功能描述:
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