參數(shù)資料
型號： AD7118CQ
廠商： ANALOG DEVICES INC
元件分類： DAC
英文描述： LOGDAC CMOS Logarithmic D/A Converter
中文描述： PARALLEL, WORD INPUT LOADING, 6-BIT DAC, CDIP16
封裝： CERDIP-16
文件頁數(shù)： 2/6頁
文件大小： 197K
代理商： AD7118CQ
AD7118–SPECIFICATIONS
(V
DD
= +5 V or +15 V, V
IN
= –10 V dc, I
OUT
= AGND = DGND = 0 V, output amplifier
AD544 except where noted)
Accuracy Specification for L/C/U Grade Devices at T
A
= +25
°
C
REV. A
–2–
T
A
= +25
8
C
T
A
= T
MIN
, T
MAX
V
DD
= +5 V
1.5
Parameter
NOMINAL RESOLUT ION
ACCURACY RELAT IVE T O V
IN
AD7118L/C/U
0 dB to –30 dB
–31.5 dB to –42 dB
–43.5 dB to –48 dB
AD7118K /B/T
0 dB to –30 dB
–31.5 dB to –42 dB
MONOT ONIC RANGE
Nominal 1.5 dB Steps
V
DD
= +5 V
1.5
V
DD
= +15 V
1.5
V
DD
= +15 V
1.5
Units
dB
T est Conditions/Comments
±
0.35
±
0.7
±
1.0
±
0.35
±
0.5
±
0.7
±
0.4
±
0.8
±
1.3
±
0.4
±
0.7
±
1.0
dB max
dB max
dB max
Accuracy is measured using
circuit of Figure 1 and includes
any effects due to mismatch
between R
and the R-2R
ladder circuit.
±
0.5
±
0.75
±
0.5
±
0.75
±
0.5
±
1.0
±
0.5
±
0.8
dB max
dB max
L/C/U Grade
K /B/T Grade
All Grades
All Grades
L/C/U Grade
K /B/T Grade
All Grades
L/C/U Grade
K /B/T Grade
Monotonic Over Full
Code Range
Monotonic Over Full Code Range
9
9
17
17
21
21
9.45
9.45
18
18
22
22
0 to –72
0 to –66
0 to –72
0 to –66
dB
dB
Digital Inputs 000000 to 110000
Digital Inputs 000000 to 101100
Nominal 3 dB Steps
V
IN
INPUT RESIST ANCE
(PIN 12)
9
17
21
9.45
18
22
9
17
21
9.45
18
22
k
min
k
max
k
max
k
min
k
max
k
max
R
FB
INPUT RESIST ANCE
(PIN 13)
DIGIT AL INPUT S
Input High Voltage Requirements V
IH
Input Low Voltage Requirements V
IL
Input Leakage Current
POWER SUPPLY
V
DD
for Specified Accuracy
3.0
0.8
±
1
13.5
1.5
±
1
3.0
0.8
±
10
13.5
1.5
±
10
V min
V max
μ
A max
Digital Inputs = V
DD
5
–
0.5
–
15
1
5
–
1
–
15
2
V min
V max
mA max
I
DD
Digital Inputs = 0 V or V
DD
(See Figure 7)
Specifications subject to change without notice.
AC PERFORMANCE CHARACTERISTICS
T hese characteristics are included for design guidance only and are not subject to test.
T
A
= +25
8
C
T
A
= T
MIN
, T
MAX
V
DD
= +5 V
0.01
Parameter
DC Supply Rejection,
Gain/
V
DD
V
DD
= +5 V
0.01
V
DD
= +15 V
0.005
V
DD
= +15 V
0.005
Units
dB per % max
V
=
±
10%,
Input code = 100000
Full-Scale Change
Measured with ADLH0032CG
as output amplifier for input
code transition 100000 to 000000.
C1 of Figure 1 is 0 pF.
Propagation Delay
Digital-to-Analog Glitch Impulse
1.8
225
0.4
1200
2.2
–
0.5
–
μ
s max
nV secs typ
Output Capacitance (Pin 14)
Input Capacitance Pin 12 and Pin 13
Feedthrough at 1 kHz
100
7
–86
–80
–85
–79
70
7
100
7
–86
–80
–85
–79
70
7
100
7
–68
–63
–85
–79
70
7
100
7
–68
–63
–85
–79
70
7
pF max
pF max
dB max
dB max
dB typ
dB typ
nV/
√
Hz
max
pF max
L/C/U Grade
K /B/T Grade
Feedthrough is also deter-
mined by circuit layout
V
= 6 V rms
per DIN 45403 Blatt 4
Includes AD544 amplifier noise
T otal Harmonic Distortion
Intermodulation Distortion
Output Noise Voltage Density
Digital Input Capacitance
Specifications subject to change without notice.
(V
DD
= +5 V or +15 V, V
IN
= –10 V except where stated, I
OUT
= AGND = DGND =
0 V, output amplifier AD544 except where noted)
Accuracy Specification for K/B/T Grade Devices at T
A
= +25
°
C
相關PDF資料
PDF描述
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AD7118KN 制造商:AD 制造商全稱:Analog Devices 功能描述:LOGDAC CMOS Logarithmic D/A Converter
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