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參數(shù)資料
| 型號(hào)： | AD7111ACR |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | ECONOLINE: REC2.2-S_DR/H1 - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- UL94V-0 Package Material- Continuous Short Circiut Protection- Internal SMD design- 100% Burned In- Efficiency to 75% |
| 中文描述： | PARALLEL, 8 BITS INPUT LOADING, 8-BIT DAC, PDSO16 |
| 封裝： | SOIC-16 |
| 文件頁數(shù)： | 7/8頁 |
| 文件大?。?/td> | 175K |
| 代理商： | AD7111ACR |
AD7111/AD7111A
REV. 0
–7–
Another error arises from the output amplifier s input offset
voltage. T he amplifier is operated with a fixed feedback resis-
tance, but the equivalent source impedance (the AD7111/
AD7111A output impedance) varies as a function of attenuation
l
evel. T his has the effect of varying thc “noise” gain of the
am
plifier, thus creating a varying error due to amplifier offset
voltage. It is recommended that an amplifier with less than
50
μ
V of input offset be used (such as the AD OP07 in dc appli-
cations. Amplifiers with higher offset voltage may cause audible
“thumps” in ac applications due to dc output changes.
T he AD7111/AD7111A accuracy is specified and tested using
only the internal feedback resistor. Any gain error (i.e., mis-
match of R
FB
to the R-2R ladder) that may exist in the
AD7111/AD7111A D/A converter circuit results in a constant
attenuation error over the whole range. T he AD7111/AD7111A
accuracy is specified relative to 0 dB attenuation, hence “Gain”
trim resistors—R1 and R2 in Figure 1—can be used to adjust
V
OUT
= V
IN
precisely (i.e., 0 dB attenuation) with input code
00000000. T he accuracy and monotonic range specifications of
the AD7111/AD7111A are not affected in any way by this gain
trim procedure. For the AD7111/AD7111A L/C/U grades, suit-
able values for R1 and R2 of Figure 1 are R1 = 500
, R2 =
180
; for the K /B/T grades, suitable value are R1 = 1000
,
R2 = 270
. For additional information on gain error the reader
is referred to the “CMOS DAC Application Guide,” available
from Analog Devices, Inc., Publication Number G872b–8–1/89.
Typical Performance Characteristics
6
0
5
3
1
1
2
0
5
4
4
3
2
INPUT VOLTAGE – Volts
I
D
–
V
IN
APPLIED TO ALL DATA INPUTS
CS = WR = 0V
V
DD
= +5V
T
A
= +25
°
C
Figure 6. Typical Supply Current vs. Logic Input Level
0.4
–0.6
30
0.0
–0.4
3
–0.2
0
0.2
27
24
21
18
15
12
9
6
ATTENUATION – dB
E
**
***
**
*
**
***
**
*
*
*
******
*
*
**
******
*
***
***
V
DD
= +5V
T
A
= +25
°
C
Figure 7. Typical Attenuation Error for 0.75 dB Steps
1.0
–1.0
0
78
0.5
–0.5
6
0.0
66
72
60
48
42
36
30
24
18
12
54
84
ATTENUATION – dB
E
T
A
= +85
°
C
T
A
= +25
°
C
V = +5V
Figure 8. Typical Attenuation Error for 3 dB Steps vs.
Temperature
Figure 9. Accuracy Specification for K/B/T Grade Devices
at T
A
= +25
°
C
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