參數(shù)資料
型號： AD7111ACN
廠商： ANALOG DEVICES INC
元件分類： DAC
英文描述： LC2MOS LOGDAC Logarithmic D/A Converter
中文描述： PARALLEL, 8 BITS INPUT LOADING, 8-BIT DAC, PDIP16
封裝： PLASTIC, DIP-16
文件頁數(shù)： 3/8頁
文件大?。?/td> 175K
代理商： AD7111ACN
AD7111/AD7111A
REV. 0
–3–
AD7111A–ELECTRICAL CHARACTERISTICS
AD7111AC Grade
T
A
= +25
8
C
0.375
AD7111AB Grade
T
A
= +25
8
C
0.375
Parameter
T
A
= T
MIN
, T
MAX
0.375
T
A
= T
MIN
, T
MAX
0.375
Units
Conditions/Comments
NOMINAL RESOLUT ION
dB
ACCURACY RELAT IVE T O
0 dB AT T ENUAT ION
0.375 dB Steps:
Accuracy
≤
±
0.17 dB
Monotonic
0.75 dB Steps:
Accuracy
≤
±
0.35 dB
Monotonic
1.5 dB Steps:
Accuracy
≤
±
0.7 dB
Monotonic
3.0 dB Steps:
Accuracy
≤
±
1.4 dB
Monotonic
6.0 dB Steps:
Accuracy
≤
±
2.7 dB
Monotonic
0 to 36
0 to 54
0 to 36
0 to 54
0 to 30
0 to 48
0 to 30
0 to 48
dB min
dB min
Guaranteed Attenuation Ranges
for Specified Step Sizes
0 to 48
0 to 72
0 to 42
0 to 66
0 to 42
0 to 72
0 to 36
0 to 60
dB min
dB min
0 to 54
Full Range
0 to 48
0 to 78
0 to 48
0 to 85.5
0 to 42
0 to 72
dB min
dB min
Full Range Is from 0 dB
to 88.5 dB
0 to 66
Full Range
0 to 54
Full Range
0 to 60
Full Range
0 to 48
Full Range
dB min
dB min
0 to 72
Full Range
0 to 60
Full Range
0 to 60
Full Range
0 to 48
Full Range
dB min
dB min
GAIN ERROR
±
0.1
±
0.15
±
0.15
±
0.20
dB max
V
IN
INPUT RESIST ANCE
9/11/15
9/11/15
7/11/18
7/11/18
k
min/typ/max
k
min/typ/max
R
FB
INPUT RESIST ANCE
DIGIT AL INPUT S
V
IH
(Input High Voltage)
V
(Input High Voltage)
Input Leakage Current
9.3/11.5/15.7 9.3/11.5/15.7
7.3/11.5/18.8 7.3/11.5/18.8
2.4
0.8
±
1
2.4
0.8
±
10
2.4
0.8
±
1
2.4
0.8
±
10
V min
V max
μ
A max
Digital Inputs = V
DD
SWIT CHING CHARACT ERIST ICS
1
t
CS
t
CH
t
WR
t
DS
t
DH
0
0
57
25
10
0
0
57
25
10
0
0
57
25
10
0
0
57
25
10
ns min
ns min
ns min
ns min
ns min
Chip Select to Write Setup T ime
Chip Select to Write Hold T ime
Write Pulse Width
Data Valid to Write Setup T ime
Data Valid to Write Hold T ime
POWER SUPPLY
V
DD
I
DD
+5
1
1
+5
2
1
+5
1
1
+5
2
1
V
mA max
mA max
Digital Inputs = V
IL
or V
IH
CS
=
WR
= 0 V
Digital Inputs = 0 V or V
DD
;
See Figure 6
NOT E
1
Sample tested at +25
°
C to ensure compliance.
Specifications subject to change without notice.
(V
DD
= +5 V, V
IN
= –10 V dc, I
OUT
= AGND = DGND = OV output amplifier
AD711 except where noted)
AC PERFORMANCE CHARACTERISTICS
These characteristics are included for design guidance only and are not subject
to test. V
DD
= +5 V, V
IN
= –10 V dc except where noted, I
OUT
= AGND = DGND = OV, output amplifier AD711 except where noted.
AD7111AC Grade
T
A
= +25
8
C
0.001
1
AD7111AB Grade
T
A
= +25
8
C
0.001
1
Parameter
T
A
= T
MIN
, T
MAX
0.005
1.5
T
A
= T
MIN
, T
MAX
Units
0.005
1.5
Conditions/Comments
DC Supply Rejection,
Gain/
V
DD
Propagation Delay
dB per % max
μ
s max
V
=
±
10%, Input Code = 00000000
Full-Scale Change Measured from
WR
Going High,
CS
= 0 V
Measured with AD843 as Output
Amplifier for Code T ransition
10000000 to 00000000
C1 of Figure 1 is 0 pF
Digital-to-Analog Glitch Impulse
10
20
10
20
nV secs typ
Output Capacitance, Pin 1
Input Capacitance, Pin 15 and Pin 16
Feedthrough at 1 kHz
T otal Harmonic Distortion
Output Noise Voltage Density
Digital Input Capacitance
50
7
–94
–91
70
7
50
7
–90
–91
70
7
50
7
–92
–91
70
7
50
7
–90
–91
70
7
pF max
pF max
dB max
dB typ
nV/
√
Hz
max
pF max
V
= 6 V rms at 1 kHz
Includes AD711 Amplifier Noise
Specifications subject to change without notice.
相關PDF資料
PDF描述
AD7111ACR ECONOLINE: REC2.2-S_DR/H1 - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- UL94V-0 Package Material- Continuous Short Circiut Protection- Internal SMD design- 100% Burned In- Efficiency to 75%
AD7111BQ ECONOLINE: REC2.2-S_DRW(Z)/H* - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- 4.5-9V, 9-18V, 18-36V, 36-72V Wide Input Range 2 : 1- UL94V-0 Package Material- Continuous Short Circiut Protection- Cost Effective- 100% Burned In- Efficiency to 84%
AD7111CQ LC2MOS LOGDAC Logarithmic D/A Converter
AD7111LN LC2MOS LOGDAC Logarithmic D/A Converter
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