參數(shù)資料
型號: AD668J
廠商: Analog Devices, Inc.
英文描述: 12-Bit Ultrahigh Speed Multiplying D/A Converter
中文描述: 12位超高速乘法D / A轉換器
文件頁數(shù): 9/16頁
文件大?。?/td> 602K
代理商: AD668J
AD668
REV. A
–9–
Figure 8. 1.25 V REFIN/
±
500 mV Unbuffered Bipolar
Output
5 V REFIN, 2 V BIPOLAR, UNBUFFERED VOLTAGE
OUTPUT
Figure 9 demonstrates how a larger unbuffered voltage output
swing can be realized. R
LOAD
(Pin 19) is tied to the DAC output
(Pin 20) to produce an output resistance of roughly 200
.
Figure 9. 5 V REFIN/
±
1 V Unbuffered Bipolar Output
It should be noted that this impedance is not trimmed, and may
vary by as much as 20%, but this can be compensated by adjust-
ing the reference voltage. It is also important to note that limita-
tions in the DAC output compliance would prohibit use of a 2 V
unipolar output voltage swing.
1 V REFIN, –10 V UNIPOLAR, BUFFERED VOLTAGE
OUTPUT
Figure 10 shows the implementation of the 1 V full scale for the
reference input by tying REFIN1 and REFIN2 together and
driving them both with the input voltage. This generates a high
input impedance, and some care should be taken to insure that
the driving impedance at this node is finite at all times to avoid
saturating the reference amplifier. This is typically accomplished
by a using a low impedance voltage source to drive the refer-
ence, but if the topology calls for this source to be switched out,
a high impedance (10 k
) termination resistor should be used
on the REFIN node.
Figure 10. 1 V REFIN/–10 V Unipolar Buffered Output
For full-scale output ranges greater than 2 V, some type of ex-
ternal buffer amplifier is needed. The AD840 fills this require-
ment perfectly, settling to within 0.025% from a 10 V full-scale
step in less than 100 ns. As shown in Figure 10, the amplifier
establishes a summing node at ground for the DAC output. The
output voltage is determined by the amplifier’s feedback resistor
(10.24 V for a 1k resistor). Note that since the DAC generates a
positive current to ground, the voltage at the amplifier output
will be negative. A series resistor between the noninverting am-
plifier input and ground minimizes the offset effects of op amp
input bias currents.
The optimal DAC output impedance in buffered output appli-
cations depends on the buffer amplifier being used. The AD840
is stable at a gain of 10, so a lower DAC output impedance
(higher noise gain) is desired for stability reasons, and R
LOAD
should be grounded. The 100
DAC output impedance pro-
duces a noise gain of 11 with the 1k feedback resistor. If the
gain-of-two stable AD842 is used as a buffer, a 200
DAC out-
put impedance will produce a stable configuration with lower
noise gain to the output; hence, R
LOAD
should be connected to
the DAC output.
As noted earlier, these four examples are part of an array of
possible configurations available. Table II provides a quick
reference chart for the more straightforward applications, but
many other input and output signals are possible with some
modifications.
The next three circuits provide examples of different analog in-
put drives, including a fixed dc reference, a capacitively coupled
ac reference, and a DAC driving the reference channel. Note
that the entire spectrum of input and output range configura-
tions are available regardless of the type of reference drive being
used.
DC REFERENCE: THE AD586 DRIVING THE AD668
Figure 11 illustrates one of the more obvious analog input
sources: a fixed reference. The AD586 produces a temperature
stable 5 V analog output to drive the AD668 in the 5 V input
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