參數(shù)資料
型號(hào)： AD664JNZ-UNI
廠(chǎng)商： Analog Devices Inc
文件頁(yè)數(shù)： 20/23頁(yè)
文件大?。?/td> 0K
描述： IC DAC 12BIT QUAD UNIPOL 28DIP
產(chǎn)品培訓(xùn)模塊： Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝： 1
設(shè)置時(shí)間： 8µs
位數(shù)： 12
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 4
電壓電源： 雙 ±
功率耗散（最大）： 525mW
工作溫度： 0°C ~ 70°C
安裝類(lèi)型： 通孔
封裝/外殼： 28-DIP（0.600"，15.24mm）
供應(yīng)商設(shè)備封裝： 28-PDIP
包裝： 管件
輸出數(shù)目和類(lèi)型： 4 電壓，單極；4 電壓，雙極
采樣率（每秒）： 125k
AD664
REV.
–6–
ANALOG CIRCUIT CONSIDERATIONS
Grounding Recommendations
The AD664 has two pins, designated ANALOG and DIGITAL
ground. The analog ground pin is the “high quality” ground ref-
erence point for the device. A unique internal design has
resulted in low analog ground current. This greatly simplifies
management of ground current and the associated induced volt-
age drops. The analog ground pin should be connected to the
analog ground point in the system. The external reference and
any external loads should also be returned to analog ground.
The digital ground pin should be connected to the digital
ground point in the circuit. This pin returns current from the
logic portions of the AD664 circuitry to ground.
Analog and digital grounds should be connected at one point in
the system. If there is a possibility that this connection be bro-
ken or otherwise disconnected, then two diodes should be con-
nected between the analog and digital ground pins of the
AD664 to limit the maximum ground voltage difference.
Power Supplies and Decoupling
The AD664 requires three power supplies for proper operation.
VLL powers the logic portions of the device and requires
+5 volts. VCC and VEE power the remaining portions of the cir-
cuitry and require +12 V to +15 V and –12 V to –15 V, respec-
tively. VCC and VEE must also be a minimum of two volts greater
then the maximum reference and output voltages anticipated.
Decoupling capacitors should be used on all power supply pins.
Good engineering practice dictates that the bypass capacitors be
located as near as possible to the package pins. VLL should be
bypassed to digital ground. VCC and VEE should be decoupled to
analog ground.
Driving the Reference Input
The reference input of the AD664 can have an impedance as
low as 1.3 k
. Therefore, the external reference voltage must be
able to source up to 7.7 mA of load current. Suitable choices
include the 5 V AD586, the 10 V AD587 and the 8.192 V
AD689.
The architecture of the AD664 derives an inverted version of
the reference voltage for some portions of the internal circuitry.
This means that the power supplies must be at least 2 V
Figure 2. Recommended Circuit Schematic
greater than both the external reference and the inverted exter-
nal reference.
Output Considerations
Each DAC output can source or sink 5 mA of current to an
external load. Short-circuit protection limits load current to a
maximum load current of 40 mA. Load capacitance of up to
500 pF can be accommodated with no effect on stability.
Should an application require additional output current, a cur-
rent boosting element can be inserted into the output loop with
no sacrifice in accuracy. Figure 3 details this method.
Figure 3. Current-Boosting Scheme
AD664 output voltage settling time is 10
s maximum. Figure 4
shows the output voltage settling time with a fixed 10 V refer-
ence, gain = 1 and all bits switched from 1 to 0.
Figure 4. Settling Time; All Bits Switched from On to Off
Alternately, Figure 5 shows the settling characteristics when the
reference is switched and the input bits remain fixed. In this
case, all bits are “on,” the gain is 1 and the reference is switched
from –5 V to +5 V.
Figure 5. Settling Time; Input Bits Fixed, Reference
Switched
D
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