參數(shù)資料
型號(hào): AD654
廠商: Analog Devices, Inc.
英文描述: Low Cost Monolithic Voltage-to-Frequency Converter(低成本單片電壓-頻率轉(zhuǎn)換器)
中文描述: 低成本單片電壓頻率轉(zhuǎn)換器(低成本單片電壓-頻率轉(zhuǎn)換器)
文件頁(yè)數(shù): 7/8頁(yè)
文件大?。?/td> 307K
代理商: AD654
AD654
REV. A
–7–
Longer count periods not only result in the count having more
resolution, they also serve as an integration of noisy analog sig-
nals. For example, a normal-mode 60 Hz sine wave riding on
the input of the AD654 will result in the output frequency in-
creasing on the positive half of the sine wave and decreasing on
the negative half of the sine wave. This effect is cancelled by se-
lecting a count period equal to an integral number of noise sig-
nal periods. A 100 ms count period is effective because it not
only has an integral number of 60 Hz cycles (6), it also has an
integral number of 50 Hz cydes (5). This is also true of the
1 second and 10 second count period.
AD654-BASED ANALOG-TO-DIGITAL CONVERSION
USING A SINGLE CHIP MICROCOMPUTER
The AD654 can serve as an analog-to-digital converter when
used with a single component microcomputer that has an inter-
val timer/event counter such as the 8048. Figure 11 shows the
AD654, with a full-scale input voltage of +1 V and a full-scale
output frequency of 100 kHz, connected to the timer/counter
input Pin T1 of the 8048. Such a system can also operate on a
single +5 V supply.
The 8748 counter is negative edge triggered; after the STRT
CNT instruction is executed subsequent high to low transitions
on T1 increment the counter. The maximum rate at which the
counter may be incremented is once per three instruction cycles;
using a 6 MHz crystal, this corresponds to once every 7.5
μ
s, or
a maximum frequency of 133 kHz. Because the counter overflows
every 256 counts (8 bits), the timer interrupt is enabled. Each
overflow then causes a jump to a subroutine where a register is
incremented. After the STOP TCNT instruction is executed,
the number of overflows that have occurred will be the number
in this register. The number in this register multiplied by 256
plus the number in the counter will be the total number of nega-
tive edges counted during the count period. The count period is
handled simply by decrementing a register the number of times
necessary to correspond to the desired count time. After the reg-
ister has been decremented the required number of times the
STOP TCNT instruction is executed.
Figure 11. AD654 VFC as an ADC
The total number of negative edges counted during the count
period is proportional to the input voltage. For example, if a 1 V
full-scale input voltage produces a 100 kHz signal and the count
period is 100 ms, then the total count will be 10,000. Scaling
from this maximum is then used to determine the input voltage,
i.e., a count of 5000 corresponds to an input voltage of 0.5 V.
As with the ICM7226, longer count times result in counts hav-
ing more resolution; and they result in the integration of noisy
analog signals.
FREQUENCY DOUBLING
Since the AD654’s output is a square-wave rather than a pulse
train, information about the input signal is carried on both
halves of the output waveform. The circuit in Figure 12 converts
the output into a pulse train, effectively doubling the output fre-
quency, while preserving the better low frequency linearity of
the AD654. This circuit also accommodates an input voltage
that is greater than the AD654 supply voltage.
Resistors R1–R3 are used to scale the 0 V to +10 V input volt-
age down to 0 V to +1 V as seen at Pin 4 of the AD654. Recall
that V
IN
must be less than V
SUPPLY
–4 V, or in this case less than
1 V. The timing resistor and capacitor are selected such that this
0 V to +1 V signal seen at Pin 4 results in a 0 kHz to 200 kHz
output frequency.
The use of R4, C1 and the XOR gate doubles this 200 kHz
output frequency to 400 kHz. The AD654 output transistor is
basically used as a switch, switching capacitor C1 between a
charging mode and a discharging mode of operation. The voltages
6
2
1
8
OSC
DRIVER
AD 654
V/F OUTPUT
74LS86
A
B
C
R4
1k
+5V
1C1
5C1
R
T
1k
R3
1k
R3
2k
8R1
R
PU
2.87k
V
IN
(0 TO + 10V)
TRANSISTOR
OFF
ON
A
B
C
V
0
V
0
0
+5
Figure 12. Frequency Doubler
seen at the input of the 74LS86 are shown in the waveform dia-
gram. Due to the difference in the charge and discharge time
constants, the output pulse widths of the 74LS86 are not equal.
The output pulse is wider when the capacitor is charging due to
its longer rise time than fall time. The pulses should therefore be
counted on their rising, rather than falling, edges.
OPERATION AT HIGHER OUTPUT FREQUENCIES
Operation of the AD654 via the conventional output (Pins 1
and 2) is speed limited to approximately 500 kHz for reasons of
TTL logic compatibility. Although the output stage may be-
come speed limited, the multivibrator core itself is able to oscil-
late to 1 MHz or more. The designer may take advantage of this
feature in order to operate the device at frequencies in excess
of 500 kHz.
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AD654JN/+ 制造商:Rochester Electronics LLC 功能描述:IC - LOW COST V/F CONV. - Bulk
AD654JNZ 功能描述:IC V-F CONVERTER MONO 8-DIP RoHS:是 類別:集成電路 (IC) >> PMIC - V/F 和 F/V 轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 類型:頻率至電壓 頻率 - 最大:10kHz 全量程:- 線性:±0.3% 安裝類型:表面貼裝 封裝/外殼:8-SOIC(0.154",3.90mm 寬) 供應(yīng)商設(shè)備封裝:8-SOIC 包裝:Digi-Reel® 其它名稱:LM2917MX-8/NOPBDKR
AD654JNZ/+ 功能描述:IC CONV VOLT-FREQ 500KHZ 8DIP RoHS:是 類別:集成電路 (IC) >> PMIC - V/F 和 F/V 轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 類型:頻率至電壓 頻率 - 最大:10kHz 全量程:- 線性:±0.3% 安裝類型:表面貼裝 封裝/外殼:8-SOIC(0.154",3.90mm 寬) 供應(yīng)商設(shè)備封裝:8-SOIC 包裝:Digi-Reel® 其它名稱:LM2917MX-8/NOPBDKR