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參數(shù)資料
| 型號(hào)： | AD641AN |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | 250 MHz Demodulating Logarithmic Amplifier |
| 中文描述： | LOG OR ANTILOG AMPLIFIER, 250 MHz BAND WIDTH, PDIP20 |
| 封裝： | PLASTIC, DIP-20 |
| 文件頁數(shù)： | 1/16頁 |
| 文件大?。?/td> | 256K |
| 代理商： | AD641AN |
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
AD641
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 1999
250 MHz Demodulating
Logarithmic Amplifier
FEATURES
Logarithmic Amplifier Performance
Usable to 250 MHz
44 dB Dynamic Range
6
2.0 dB Log Conformance
37.5 mV/dB Voltage Output
Stable Slope and Intercepts
2.0 nV/
√
Hz
Input Noise Voltage
50
m
V Input Offset Voltage
Low Power
6
5 V Supply Operation
9 mA (+V
S
), 35 mA (–V
S
) Quiescent Current
Onboard Resistors
Onboard 10
3
Attenuator
Dual Polarity Current Outputs
Direct Coupled Differential Signal Path
APPLICATIONS
IF/RF Signal Processing
Received Signal Strength Indicator (RSSI)
High Speed Signal Compression
High Speed Spectrum Analyzer
ECM/Radar
PIN CONFIGURATIONS
20-Lead Plastic DIP (N)
20-Lead Cerdip (Q)
TOP VIEW
(Not to Scale)
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
AD641
ATN COM
CKT COM
–INPUT
ATN LO
ATN COM
ATN IN
BL1
–V
S
ITC
–OUTPUT
BL2
ATN OUT
+INPUT
RG1
RG0
RG2
LOG OUT
LOG COM
+V
S
+OUTPUT
20-Lead PLCC (P)
3 2 1 20 19
9 10 11 12 13
18
17
16
15
14
4
5
6
7
8
TOP VIEW
(Not to Scale)
PIN 1
ATN COM
CKT COM
AD641
A
A
–
+
A
B
S
S
+
S
L
ATN IN
BL1
–V
S
ITC
RG1
RG0
RG2
LOG OUT
PRODUCT DESCRIPTION
The AD641 is a 250 MHz, demodulating logarithmic amplifier
with an accuracy of
±
2.0 dB and 44 dB dynamic range. The
AD641 uses a successive detection architecture to provide an
output current that is logarithmically proportional to its input
voltage. The output current can be converted to a voltage using
one of several on-chip resistors to select the slope. A single
AD641 provides up to 44 dB of dynamic range at speeds up to
250 MHz, and two cascaded AD641s together can provide
58 dB of dynamic range at speeds up to 250 MHz. The AD641
is fully stable and well characterized over either the industrial or
military temperature ranges.
The AD641 is not a logarithmic building block, but rather a
complete logarithmic solution for compressing and measuring
wide dynamic range signals. The AD641 is comprised of five
stages and each stage has a full wave rectifier, whose current
depends on the absolute value of its input voltage. The output
of these stages are summed together to provide the demodulated
output current scaled at 1 mA per decade (50
μ
A/dB).
Without utilizing the 10
×
input attenuator, log conformance of
2.0 dB is maintained over the input range –44 dBm to 0 dBm.
The attenuator offers the most flexibility without significantly
impacting performance.
The 250 MHz bandwidth and temperature stability make this
product ideal for high speed signal power measurement in RF/
IF systems. ECM/Radar and Communication applications are
routinely in the 100 MHz–180 MHz range for power measure-
ment. The bandwidth and accuracy, as well as dynamic range,
make this part ideal for high speed, wide dynamic range signals.
The AD641 is offered in industrial (–40
°
C to +85
°
C) and mili-
tary (–55
°
C to +125
°
C) package temperature ranges. Industrial
versions are available in plastic DIP and PLCC; MIL versions
are packaged in cerdip.
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