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參數(shù)資料
| 型號(hào)： | AD640JN |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | DC-Coupled Demodulating 120 MHz Logarithmic Amplifier |
| 中文描述： | LOG OR ANTILOG AMPLIFIER, 145 MHz BAND WIDTH, PDIP20 |
| 封裝： | PLASTIC, DIP-20 |
| 文件頁(yè)數(shù)： | 16/16頁(yè) |
| 文件大?。?/td> | 278K |
| 代理商： | AD640JN |
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AD640
REV. C
–16–
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
be increased and U3 can be replaced by a low speed op amp.
Figure 31 shows typical performance of this converter.
10 Hz–100 kHz Converter with 95 dB Dynamic Range
To increase the dynamic range it is necessary to reduce the
bandwidth by the inclusion of a low-pass filter at the signal
interface between U1 and U2 (Figure 32). To provide operation
down to low frequencies, dc coupling is used at the interface
between AD640s and the input offset is nulled by a feedback
circuit.
Using values of 0.02
μ
F in the interstage filter formed by capaci-
tors C1 and C2, the hf corner occurs at about 100 kHz. U3
(AD712) forms a 4-pole 35 Hz low-pass filter. This provides
operation to signal frequencies below 20 Hz. The filter response
is not critical, allowing the use of an electrolytic capacitor to
form one of the poles.
R1 is restricted to 50
by the compliance at Pin 14, so C3
needs to be large to form a 5 ms time constant. A tantalum
capacitor is used (note polarity). The output of U3a is scaled
+1 V per decade, and the X2 gain of U3b raises this to +2 V per
decade, or +100 mV/dB. The differential offset at the output of
U2 is low-pass filtered by R6/C7 and R7/C8 and buffered by
voltage followers U4a and U4b. The 16s open loop time constant
translates to a closed loop high-pass corner of 10 Hz. (This
high-pass filter is only operative for very small inputs; see page
13.) Figure 33 shows the performance for square wave inputs.
Since the attenuator is used, the upper end of the dynamic
range now extends to +6 dBV and the intercept is at –82 dBV.
The noise limited dynamic range is over 100 dB, but in practice
spurious signals at the input will determine the achievable range.
INPUT AMPLITUDE AT 10kHz
–1
–90
31.6
m
L
O
0
1
2
3
4
5
6
7
8
9
–80
100
m
–70
316
m
–60
1m
–50
3.16m
–40
10m
–30
31.6m
–20
100m
–10
316m
0
1
10
3.16
dBV
V
–2
0
2
E
T
Figure 33. Logarithmic Output and Nonlinearity for Circuit
of Figure 32, for a Square Wave Input at f = 10 kHz
C
P
20-Lead Ceramic DIP (D) Package
20
1
10
11
0.300 (7.62)
0.280 (7.11)
PIN 1
0.320 (8.13)
0.300 (7.62)
0.430 (10.16)
SEATING
PLANE
0.020 (0.51)
0.015 (0.38)
1.010 (25.65)
0.990 (25.15)
0.095
(2.41)
0.210 (5.33)
0.150 (3.81)
0.054 (1.37)
0.040 (1.01)
0.10
(2.54)
0.085
(2.16)
0.012 (0.30)
0.008 (0.20)
0.300 (7.62)
20-Terminal Ceramic LCC (E) Package
1
20
4
9
8
13
19
14
3
18
IPIN 1
BOTTOM VIEW
0.20
3
45
8
(0.51
3
45
8
)
REF
0.025
6
0.003
(0.635
6
0.075)
0.050
(1.27)
0.040
3
45
8
(1.02
45
8
)
REF 3 PLCS
0.350
6
(8.89
6
0.008
0.082
6
0.018
(2.085
6
0.455)
20-Lead Plastic DIP (N) Package
20
1
10
11
PIN 1
0.250
(6.350)
TYP
1.070 (27.18)
0.310
(7.874)
TYP
0.014 (0.356)
0.008 (0.203)
0.180
(4.572)
MAX
0.300 (7.62)
TYP
15
8
0
8
SEATING
PLANE
0.045 (1.143)
0.025 (0.635)
0.021 (0.533)
0.015 (0.381)
0.100
(2.54)
TYP
0.125 (3.18)
MIN
0.033
(0.838)
TYP
20-Lead PLCC (P) Package
0.017
6
0.004
(0.432
6
0.101)
0.029
6
0.003
(0.737
6
0.076)
0.025 (0.64) MIN
0.060 (1.53) MIN
0.020 (0.51) MIN
R(0.89
6
0.01
6
0.25)
0.173
6
0.008
(4.385
6
0.185)
0.105
6
0.015
(2.665
6
0.375)
3
IDPIN 1
4
19
18
8
9
14
13
(PINS DOWN)
0.020 (0.51)
MAX
0.050
(1.27)
0.045
6
0.003
(1.143
6
0.076)
0.353
6
0.076)SQ
(8.966
6
0.390
6
0.125)SQ
(9.905
6
0.020
(0.51)
MAX
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD640JP | DC-Coupled Demodulating 120 MHz Logarithmic Amplifier |
| AD640T | DC-Coupled Demodulating 120 MHz Logarithmic Amplifier |
| AD640TD | DC-Coupled Demodulating 120 MHz Logarithmic Amplifier |
| AD640TE | DC-Coupled Demodulating 120 MHz Logarithmic Amplifier |
| AD640]N | DC-Coupled Demodulating 120 MHz Logarithmic Amplifier |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD640JN | 制造商:Analog Devices 功能描述:SEMICONDUCTORSLINEAR |
| AD640JNZ | 功能描述:IC AMP LOG 2.3MA 20DIP RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 其它有關(guān)文件:TS1854A View All Specifications 標(biāo)準(zhǔn)包裝:50 系列:- 放大器類型:通用 電路數(shù):4 輸出類型:滿擺幅 轉(zhuǎn)換速率:0.25 V/µs 增益帶寬積:630kHz -3db帶寬:- 電流 - 輸入偏壓:16nA 電壓 - 輸入偏移:1000µV 電流 - 電源:162µA 電流 - 輸出 / 通道:48mA 電壓 - 電源，單路/雙路(±):1.8 V ~ 6 V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:14-SO 包裝:管件 |
| AD640JNZ | 制造商:Analog Devices 功能描述:Operational Amplifier (Op-Amp) IC |
| AD640JP | 功能描述:IC AMP LOG 2.3MA 20PLCC RoHS:否 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 其它有關(guān)文件:TS1854A View All Specifications 標(biāo)準(zhǔn)包裝:50 系列:- 放大器類型:通用 電路數(shù):4 輸出類型:滿擺幅 轉(zhuǎn)換速率:0.25 V/µs 增益帶寬積:630kHz -3db帶寬:- 電流 - 輸入偏壓:16nA 電壓 - 輸入偏移:1000µV 電流 - 電源:162µA 電流 - 輸出 / 通道:48mA 電壓 - 電源，單路/雙路(±):1.8 V ~ 6 V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:14-SO 包裝:管件 |
| AD640JP-REEL | 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel |
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