TA = 25°C, V
參數(shù)資料
型號: AD633JRZ-R7
廠商: Analog Devices Inc
文件頁數(shù): 16/21頁
文件大?。?/td> 0K
描述: IC MULTIPLIER ANALOG 8SOIC
標準包裝: 1
功能: 模擬乘法器
位元/級數(shù): 四象限
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應商設備封裝: 8-SOICN
包裝: 標準包裝
其它名稱: AD633JRZ-R7DKR
Data Sheet
AD633
Rev. J | Page 3 of 20
SPECIFICATIONS
TA = 25°C, VS = ±15 V, RL ≥ 2 kΩ.
Table 1.
Parameter
Conditions
Min
Typ
Max
Unit
TRANSFER FUNCTION
(
)(
)
Z
Y2
Y1
X2
X1
W
+
=
V
10
MULTIPLIER PERFORMANCE
Total Error
10 V ≤ X, Y ≤ +10 V
±1
% full scale
TMIN to TMAX
±3
% full scale
Scale Voltage Error
SF = 10.00 V nominal
±0.25%
% full scale
Supply Rejection
VS = ±14 V to ±16 V
±0.01
% full scale
Nonlinearity, X
X = ±10 V, Y = +10 V
±0.4
% full scale
Nonlinearity, Y
Y = ±10 V, X = +10 V
±0.1
±0.41
% full scale
X Feedthrough
Y nulled, X = ±10 V
±0.3
% full scale
Y Feedthrough
X nulled, Y = ±10 V
±0.1
±0.41
% full scale
Output Offset Voltage2
±5
±501
mV
DYNAMICS
Small Signal Bandwidth
VO = 0.1 V rms
1
MHz
Slew Rate
VO = 20 V p-p
20
V/s
Settling Time to 1%
ΔVO = 20 V
2
s
OUTPUT NOISE
Spectral Density
0.8
V/√Hz
Wideband Noise
f = 10 Hz to 5 MHz
1
mV rms
f = 10 Hz to 10 kHz
90
V rms
OUTPUT
Output Voltage Swing
±111
V
Short Circuit Current
RL = 0 Ω
30
mA
INPUT AMPLIFIERS
Signal Voltage Range
Differential
±101
V
Common mode
±101
V
Offset Voltage (X, Y)
±5
±301
mV
CMRR (X, Y)
VCM = ±10 V, f = 50 Hz
80
dB
Bias Current (X, Y, Z)
0.8
2.01
A
Differential Resistance
10
POWER SUPPLY
Supply Voltage
Rated Performance
±15
V
Operating Range
±181
V
Supply Current
Quiescent
4
mA
1
This specification was tested on all production units at electrical test. Results from those tests are used to calculate outgoing quality levels. All minimum and maximum
specifications are guaranteed; however, only this specification was tested on all production units.
2
Allow approximately 0.5 ms for settling following power on.
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