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AD623
–14–
REV. C
plane. Maximum isolation between analog and digital is achieved
by connecting the ground planes back at the supplies. The digi-
tal return currents from the ADC, which flow in the analog ground
plane will, in general, have a negligible effect on noise performance.
If there is only a single power supply available, it must be shared
by both digital and analog circuitry. Figure 46 shows how to
minimize interference between the digital and analog circuitry.
As in the previous case, separate analog and digital ground
planes should be used (reasonably thick traces can be used as an
alternative to a digital ground plane). These ground planes
should be connected at the power supply’s ground pin. Separate
traces should be run from the power supply to the supply pins of
the digital and analog circuits. Ideally, each device should have
its own power supply trace, but these can be shared by a num-
ber of devices as long as a single trace is not used to route cur-
rent to both digital and analog circuitry.
Ground Returns for Input Bias Currents
Input bias currents are those dc currents that must flow in order
to bias the input transistors of an amplifier. These are usually
transistor base currents. When amplifying “floating” input sources
such as transformers or ac-coupled sources, there must be a
direct dc path into each input in order that the bias current can
flow. Figure 47 shows how a bias current path can be provided
for the cases of transformer coupling, capacitive ac-coupling and
for a thermocouple application. In dc-coupled resistive bridge
LOAD
TO POWER
SUPPLY
GROUND
R
G
–INPUT
+INPUT
AD623
V
OUT
+V
S
REFERENCE
–V
S
Figure 47a. Ground Returns for Bias Currents with
Transformer Coupled Inputs
LOAD
TO POWER
SUPPLY
GROUND
R
G
–INPUT
+INPUT
AD623
V
OUT
+V
S
REFERENCE
–V
S
Figure 47b. Ground Returns for Bias Currents with
Thermocouple Inputs
LOAD
TO POWER
SUPPLY
GROUND
R
G
–INPUT
+INPUT
AD623
V
OUT
+V
S
REFERENCE
–V
S
100k
V
100k
V
Figure 47c. Ground Returns for Bias Currents with AC
Coupled Inputs
applications, providing this path is generally not necessary as the
bias current simply flows from the bridge supply through the
bridge and into the amplifier. However, if the impedances that
the two inputs see are large and differ by a large amount (>10k
),
the offset current of the input stage will cause dc errors propor-
tional with the input offset voltage of the amplifier.
Output Buffering
The AD623 is designed to drive loads of 10 k
or greater. If the
load is less that this value, the AD623’s output should be buff-
ered with a precision single supply op amp such as the OP113.
This op amp can swing from 0 V to 4 V on its output while
driving a load as small as 600
. Table III summarizes the per-
formance of some other buffer op amps.
+5V
R
G
V
IN
V
OUT
0.1
m
F
AD623
REF
OP113
+5V
0.1
m
F
Figure 48. Output Buffering
Table III. Buffering Options
Op Amp
Comments
OP113
OP191
OP150
Single Supply, High Output Current
Rail-to-Rail Input and Output, Low Supply Current
Rail-to-Rail Input and Output, High Output Current
A Single Supply Data Acquisition System
Interfacing bipolar signals to single supply analog to digital
converters (ADCs) presents a challenge. The bipolar signal
must be “mapped” into the input range of the ADC. Figure 49
shows how this translation can be achieved.
6
10mV
+5V
0.1
m
F
AD623
REF
R
G
1.02k
V
+5V
REF
OUT
REF
IN
A
IN
AD7776
+5V
0.1
m
F
Figure 49. A Single Supply Data Acquisition System
The bridge circuit is excited by a +5 V supply. The full-scale
output voltage from the bridge (
±
10 mV) therefore has a
common-mode level of 2.5 V. The AD623 removes the common-
mode component and amplifies the input signal by a factor of
100 (R
GAIN
= 1.02 k
). This results in an output signal of
±
1 V.
In order to prevent this signal from running into the AD623’s
ground rail, the voltage on the REF pin has to be raised to at
least 1 V. In this example, the 2 V reference voltage from the
AD7776 ADC is used to bias the AD623’s output voltage to 2V
±
1 V. This corresponds to the input range of the ADC.