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參數(shù)資料
| 型號(hào)： | AD621B |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | DC/DC變換器 |
| 英文描述： | RE Series - Econoline Unregulated DC-DC Converters; Input Voltage (Vdc): 3.3V; Output Voltage (Vdc): 3.3V; Power: 1W; Industry Standard Pinout; 1kVDC & 2kVDC Isolation; UL94V-0 Package Material; Optional Continuous Short Circuit Protected; Fully Encapsulated; Custom Solutions Available; Efficiency to 85% |
| 中文描述： | 低漂移，低功耗儀表放大器 |
| 文件頁數(shù)： | 12/16頁 |
| 文件大?。?/td> | 663K |
| 代理商： | AD621B |
AD621
REV. A
–12–
AD548
1
8
6
5
3
2
x10
AD621
DAC
0 TO
±
10V
1
8
6
5
3
2
x10
AD621
10k
10k
V
OUT2
TOTAL GAIN = 100
Optional
V
DIFF
±
0.5V
INPUT A:
±
10V CM
V
COM
±
10V–
+
–
+
V
DIFF
+ V
OFFSET
±
(1.25V + 1V)
–
INPUT B:
±
1V
OFFSET
+
V
OUT1
6
3
2
TO
REF
C
R
TO
V
OUT1
Use this in place of the DAC for zero suppression function.
G = 10
Figure 32. Suppressing a Large Common-Mode or Offset Voltage in Order to Measure a Small Differential Signal
(V
S
=
±
15 V)
The AD621, as well as many other monolithic instrumentation
amplifiers, is based on the “three op amp” in amp circuit (Fig-
ure 33) amplifier. Since the input amplifiers (A1 and A2) have a
c
ommon-mode gain of unity and a differential gain equal to the
set gain of the overall in amp, the voltages V1 and V2 are de-
fined by the equations
V
1
=
V
CM
+
G
×
V
DIFF
/2
V
2
=
V
CM
–
G
×
V
DIFF
/2
The common-mode voltage will drive the outputs of amplifiers
A1 and A2 to the differential-signal voltage, multiplied by the
gain, spreads them apart. For a +10 V common-mode +0.1 V
differential input, V1 would be at +10.5 V and V2 at +9.5 V.
A1
A2
A3
4.44k
20k
20k
V1
10k
V2
10k
10k
10k
INPUT AMPLIFIER
OUTPUT AMPLIFIER
DIFFERENTIAL GAIN = 10
COMMON MODE GAIN = 1
DIFFERENTIAL GAIN = 1
COMMON MODE GAIN = 1/1000
Figure 33. Typical Three Op Amp Instrumentation
Amplifier, Differential Gain = 10
The AD621’s input amplifiers can provide output voltage within
2.5 V of the supplies. To avoid saturation of the input amplifier
the input voltage must therefore obey the equations:
V
CM
+ G
×
V
DIFF
/
2
≤
(
Upper
Supply – 2.5
V
)
V
CM
– G
×
V
DIFF
/
2
≥
(
Lower
Supply + 2.5
V
)
Figure 34 shows the trade-off between common-mode and
differential-mode input for
±
15 V supplies and G = 10.
By cascading with use of the optional AD621, the circuit of Fig-
ure 32 will provide
±
1 V of zero suppression at gains of 10 and
100 (at V
OUT1
and V
OUT2
respectively) with maximum TCs of
±
4 ppm/
°
C and
±
8 ppm/
°
C, respectively. Therefore, depending
on the magnitude of the differential input signal, either V
OUT1
or
V
OUT2
may be used as the output.
0
±
0.2
0
±
0.6
±
0.4
±
1.0
±
1.2
±
0.8
±
12
±
10
±
6
±
4
±
2
±
8
V
D
– Volts
V
CM
Figure 34. Trade-Off Between V
CM
and V
DIFF
Range (V
S
=
±
15 V, G = 10), for Reference Pin at Ground
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