參數(shù)資料
型號(hào): AD621ARZ-RL
廠商: Analog Devices Inc
文件頁(yè)數(shù): 6/16頁(yè)
文件大小: 0K
描述: IC AMP INST LDRIFT LP 18MA 8SOIC
標(biāo)準(zhǔn)包裝: 2,500
放大器類型: 儀表
電路數(shù): 1
轉(zhuǎn)換速率: 1.2 V/µs
-3db帶寬: 800kHz
電流 - 輸入偏壓: 500pA
電壓 - 輸入偏移: 75µV
電流 - 電源: 900µA
電流 - 輸出 / 通道: 18mA
電壓 - 電源,單路/雙路(±): ±2.3 V ~ 18 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SO
包裝: 帶卷 (TR)
AD621
REV. B
–14–
Gain Selection
The AD621 has accurate, low temperature coefficient (TC),
gains of 10 and 100 available. The gain of the AD621 is nomi-
nally set at 10; this is easily changed to a gain of 100 by simply
connecting a jumper between Pins 1 and 8.
AD621
555.5
5,555.5
REXT
Figure 11. Programming the AD621 for Gains Between
10 and 100
As shown in Figure 11, the device can be programmed for any
gain between 10 and 100 by connecting a single external resistor
between Pins 1 and 8. Note that adding the external resistor will
degrade both the gain accuracy and gain TC. Since the gain
equation of the AD621 yields:
G
= 1+
9( RX + 6,111.111)
( RX + 555.555)
This can be solved for the nominal value of external resistor for
gains between 10 and 100:
RX =
(G – 1) 555.555 – 55,000
(10 – G )
Table III gives practical 1% resistor values for several com-
mon gains.
Table III. Practical 1% External Resistor
Values for Gains Between 10 and 100
Desired Recommended
Temperature
Gain
1% Resistor Value
Gain Error Coefficient (TC)
10
∞ (Pins 1 and 8 Open)
*
5 ppm/
°C max
20
4.42 k
±10%
≈0.4 (50 ppm/°C
+ Resistor TC)
50
698
±10%
≈0.4 (50 ppm/°C
+ Resistor TC)
100
0 (Pins 1 and 8 Shorted)
*
5 ppm/
°C max
*Factory trimmed–exact value depends on grade.
A High Performance Programmable Gain Amplifier
The excellent performance of the AD621 at a gain of 10 makes
it a good choice to team up with the AD526 programmable gain
amplifier (PGA) to yield a differential input PGA with gains of
10, 20, 40, 80, 160. As shown in Figure 12, the low offset of the
AD621 allows total circuit offset to be trimmed using the offset
null of the AD526, with only a negligible increase in total drift
error. The total gain TC will be 9 ppm/
°C max, with 2 V/°C
typical input offset drift. Bandwidth is 600 kHz to gains of 10 to
80, and 350 kHz at G = 160. Settling time is 13
s to 0.01%
for a 10 V output step for all gains.
+
–VS
AD621
+VS
INPUTS
+
0.1 F
G = 10
+
–VS
AD526
+VS
0.1 F
20k
0.1 F
2
OUTPUT
Figure 12. A High Performance Programmable Gain
Amplifier
COMMON-MODE REJECTION
Instrumentation amplifiers like the AD621 offer high CMR
which is a measure of the change in output voltage when both
inputs arc changed by equal amounts. These specifications are
usually given for a full-range input voltage change and a speci-
fied source imbalance.
For optimal CMR, the reference terminal should be tied to a
low impedance point, and differences in capacitance and resis-
tance should be kept to a minimum between the two inputs. In
many applications shielded cables are used to minimize noise,
and for best CMR over frequency the shield should he properly
driven. Figures 13 and 14 show active data guards that are config-
ured to improve ac common-mode rejections by “bootstrapping”
the capacitances of input cable shields, thus minimizing the
capacitance mismatch between the inputs.
–INPUT
+INPUT
100
100k
–VS
+VS
VOUT
REFERENCE
AD621
AD648
+
Figure 13. Differential Shield Driver, G = 10
AD548
100
– INPUT
+ INPUT
REFERENCE
VOUT
AD621
4
–VS
+VS
8
3
1
2
7
5
6
Figure 14. Common-Mode Shield Driver, G = 100
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