參數(shù)資料
型號: AD621AN
廠商: ANALOG DEVICES INC
元件分類: 運動控制電子
英文描述: Low Drift, Low Power Instrumentation Amplifier
中文描述: INSTRUMENTATION AMPLIFIER, 185 uV OFFSET-MAX, 0.2 MHz BAND WIDTH, PDIP8
封裝: MINI, PLASTIC, DIP-8
文件頁數(shù): 14/16頁
文件大?。?/td> 663K
代理商: AD621AN
AD621
REV. A
–14–
Gain Selection
The AD621 has accurate, low temperature coefficient (TC),
gains of 10 and 100 available. The gain of the AD621 is nomi-
nally set at 10; this is easily changed to a gain of 100 by simply
connecting a jumper between Pins 1 and 8.
6
5
3
2
AD621
...
R
EXT
555.5
5,555.5
...
Figure 37. Programming the AD621 for Gains Between
10 and 100
As shown in Figure 37, the device can be programmed for any
gain between 10 and 100 by connecting a single external resistor
between Pins 1 and 8. Note that adding the external resistor will
degrade both the gain accuracy and gain TC. Since the gain
equation of the AD621 yields:
G
=
1
+
9(
R
X
+
6,111.111)
(
R
X
+
555.555)
This can be solved for the nominal value of external resistor for
gains between 10 and 100:
R
X
=
(
G
–1)555.555– 55,000
(10 –
G
)
Table III gives practical 1% resistor values for several common
gains.
Table III. Practical 1% External Resistor
Values for Gains Between 10 and 100
Desired Recommended
Gain
1% Resistor Value
Gain Error Temperature
Coefficient (TC)
10
20
(Pins 1 and 8 Open)
4.42 k
*
≈±
10%
*5 ppm/
°
C max
0.4 (50 ppm/
°
C
+ Resistor TC)
0.4 (50 ppm/
°
C
+ Resistor TC)
*5 ppm/
°
C max
50
698
≈±
10%
100
0 (Pins 1 and 8 Shorted)*
A High Performance Programmable Gain Amplifier
The excellent performance of the AD621 at a gain of 10 make it
a good choice to team up with the AD526 programmable gain
amplifier (PGA) to yield a differential input PGA with gains of
10, 20, 40, 80, 160. As shown in Figure 38, the low offset of the
AD621 allows total circuit offset to be trimmed using the offset
null of the AD526, with only a negligible increase in total drift
error. The total gain TC will be 9 ppm/
°
C max, with 2
μ
V/
°
C
typical input offset drift. Bandwidth is 600 kHz to gains of 10 to
80, and 350 kHz at G = 160. Settling time is 13
μ
s to 0.01%
for a 10 V output step for all gains.
7
4
6
5
3
2
AD621
+V
S
–V
S
INPUTS
+
10
7
9
4
3
AD526
+V
S
–V
S
0.1
μ
F
0.1
μ
F
G = 10
8
5
6
0.1
μ
F
OUTPUT
2
20k
OFFSET
NULL
(OPTIONAL)
0.1
μ
F
Figure 38. A High Performance Programmable Gain
Amplifier
COMMON-MODE REJECTION
Instrumentation amplifiers like the AD621 offer high CMR
which is a measure of the change in output voltage when both
inputs arc changed by equal amounts. These specifications are
usually given for a full-range input voltage change and a speci-
fied source imbalance.
For optimal CMR the reference terminal should be tied to a low
impedance point, and differences in capacitance and resistance
should be kept to a minimum between the two inputs. In many
applications shielded cables are used to minimize noise, and for
best CMR over frequency the shield should he properly driven.
Figures 39 and 40 show active data guards which are configured
to improve ac common-mode rejections by “bootstrapping” the
capacitances of input cable shields, thus minimizing the capaci-
tance mismatch between the inputs.
REFERENCE
V
OUT
AD621
100
100
– INPUT
+ INPUT
AD648
1
2
3
7
8
5
6
4
+V
S
–V
S
100k
100k
–V
S
Figure 39. Differential Shield Driver, G = 10
AD548
100
– INPUT
+ INPUT
REFERENCE
V
OUT
AD621
4
–V
S
+V
S
8
3
1
2
7
5
6
Figure 40. Common-Mode Shield Driver, G = 100
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