參數(shù)資料
型號: AD6140ARS
廠商: ANALOG DEVICES INC
元件分類: 通信及網(wǎng)絡(luò)
英文描述: RE Series - Econoline Unregulated DC-DC Converters; Input Voltage (Vdc): 3.3V; Output Voltage (Vdc): 12V; Power: 1W; Industry Standard Pinout; 1kVDC & 2kVDC Isolation; UL94V-0 Package Material; Optional Continuous Short Circuit Protected; Fully Encapsulated; Custom Solutions Available; Efficiency to 85%
中文描述: SPECIALTY TELECOM CIRCUIT, PDSO20
封裝: PLASTIC, SSOP-20
文件頁數(shù): 8/8頁
文件大?。?/td> 109K
代理商: AD6140ARS
REV. 0
AD6140
–8–
C
P
LEVEL DIAGRAM
Figure 10 shows a simplified block diagram of the AD6140 with
the expected signal levels for the minimum gain configuration.
MIXER POST
AMPLIFIER
MIXER
LOCAL
OSCILLATOR INPUT
49.792MHz
–16.3 dBm REFERRED TO 50
V
D
MODULATOR
AGC
DETECTOR
CIRCUIT
PREAMPLIFIER
IF INPUT
f = 49.6MHz
60mV p-p
D
DATA OUT
378mV p-p
AT 192kHz
Figure 10. Level Diagram
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
20-Lead SSOP
(RS-20)
20
11
10
1
0.295 (7.50)
0.271 (6.90)
0.311 (7.9)
0.301 (7.64)
0.212 (5.38)
0.205 (5.21)
PIN 1
SEATING
PLANE
0.008 (0.203)
0.002 (0.050)
0.07 (1.78)
0.066 (1.67)
0.0256
(0.65)
BSC
0.078 (1.98)
0.068 (1.73)
0.009 (0.229)
0.005 (0.127)
0.037 (0.94)
0.022 (0.559)
8
8
0
8
Motorola ReFLEX Transceiver
Figure 11 shows a block diagram of the Motorola ReFLEX
chipset solution including the AD6140. As can be seen, the
AD6140 accepts an IF input from a crystal filter at 49.6 MHz.
The frequency synthesizer provides the 6.144 MHz clock, while
the LO is also generated from the frequency synthesizer but is
fed to the AD6140 via the I/Q modulator. The IF data output
and the clock output both feed into the IF data processor. The
LNA bias amplifier provides the AGC voltage for the first LNA
in the receive path. The dc power is supplied from the power
management chip.
LNA
MAX847
PWR MGT
2.8V DV
DD
2.7V AV
DD
PRIMARY
BATTERY
TRANSMIT
POWER
SOURCE
Tx/Rx
SW
2.4V HBT
PA
SAW
FILTER
929-941MHz SC-4344-A
XTAL
FILTER
49.6MHz
AGC
1 WATT
986-902MHz
MC145181
FREQUENCY
SYNTHESIZER
TRF9506
I/Q
MODULATOR
76.8MHz
REF CLK
IF DATA
CLOCK
AD6140
D
A/D
IF DATA
PROCESSOR
SPI TO
REFLEX
CODEC
6.144MHz
SAMPLING
CLK
Tx DATA
Figure 11. ReFLEX Transceiver Block Diagram
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