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參數(shù)資料
| 型號： | AD606JCHIPS |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運(yùn)動控制電子 |
| 英文描述： | 50 MHz, 80 dB Demodulating Logarithmic Amplifier with Limiter Output |
| 中文描述： | LOG OR ANTILOG AMPLIFIER, 50 MHz BAND WIDTH, UUC16 |
| 封裝： | DIE |
| 文件頁數(shù)： | 10/12頁 |
| 文件大?。?/td> | 448K |
| 代理商： | AD606JCHIPS |
REV. B
–10–
AD606–Typical Performance Characteristics
5
–25
20
–10
–20
–60
–15
–80
0
–5
0
–20
–40
INPUT LEVEL – dBm
N
10.7MHz
45MHz
70MHz
Figure 11. Normalized Limiter
Phase Response vs. Input Level at
10.7 MHz, 45 MHz, and 70 MHz
10
–2
–4
–60
–3
–80
1
–1
0
2
3
4
0
–40
–20
INPUT AMPLITUDE – dBm
L
T
A
= –25
8
C
T
A
= +70
8
C
T
A
= +25
8
C
Figure 14. Logarithmic Conform-
ance as a Function of Input Level at
10.7 MHz at –25
°
C, +25
°
C, and
+70
°
C
Figure 17. V
LOG
Response to a
10.7 MHz CW Signal Modulated by
a 25
μ
s Wide Pulse with a 25 kHz
Repetition Rate Using 200 pF Input
Coupling Capacitors. The Input Sig-
nal Goes from +5 dBm to –75 dBm
in 20 dB Steps.
0.5
–5.5
20
–2.5
–4.5
–60
–3.5
–80
–0.5
–1.5
0
–20
–40
INPUT LEVEL – dBm
N
–6.5
–50
–70
–10
–30
10.7MHz
45MHz
70MHz
Figure 10. Normalized Limiter
Amplitude Response vs. Input Level
at 10.7 MHz, 45 MHz and 70 MHz
4.5
0
–80
10
1
0.5
–60
2
1.5
2.5
3
3.5
4
0
–20
–40
INPUT POWER – dBm
V
L
V
S
= 5.5V
V
S
= 5V
V
S
= 4.5V
T
A
= +25
8
C
Figure 13. V
LOG
Plotted vs. Input
Level at 10.7 MHz as a Function of
Power Supply Voltage
Figure 16. Limiter Response at
Onset of 10.7 MHz Modulated Pulse
at –75 dBm Using 200 pF Input
Coupling Capacitors
PRUP VOLTAGE – Volts
P
14
0
5
6
2
0.5
4
0
12
8
10
4.5
4
3.5
3
2.5
2
1.5
1
Figure 12. Supply Current vs. PRUP
Voltage at +25
°
C
5
–5
10
–2
–4
–60
–3
–80
1
–1
0
2
3
4
0
–40
–20
INPUT AMPLITUDE – dBm
L
T
A
= –25
8
C
T
A
= +70
8
C
T
A
= +25
8
C
Figure 15. Logarithmic Conform-
ance as a Function of Input Level at
45 MHz at –25
°
C, +25
°
C, and +70
°
C
Figure 18. Limiter Response at
Onset of 70 MHz Modulated Pulse
at –55 dBm Using 200 pF Input
Coupling Capacitors
8/30/99 9 AM
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