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參數(shù)資料
| 型號： | AD605AR-REEL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | Dual, Low Noise, Single-Supply Variable Gain Amplifier |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO16 |
| 封裝： | MS-012-AC, SOIC-16 |
| 文件頁數(shù)： | 11/12頁 |
| 文件大?。?/td> | 263K |
| 代理商： | AD605AR-REEL |
AD605
–11–
REV. C
Two other easy combinations are possible to provide a gain
range of –14 dB to +82.8 dB: (1) make R1 a short and R2 an
open; or (2) make R1 an open and R2 a short. The bandwidth
for both of these cases will be dominated by the channel that is
set to the higher gain and will be about 8 MHz. From a noise
standpoint, the second choice is the best since by increasing the
gain of the first amplifier, the second amplifier’s noise will have
less of an impact on the total output noise. One further observa-
tion regarding noise is that by increasing the gain the output
noise will increase proportionally; therefore, there is
no
increase
in signal-to-noise ratio. It will actually stay fixed.
It should be noted that by selecting the appropriate values of R1
and R2, any gain range between –28 dB to +68.8 dB and 0 dB
to +96.8 dB can be achieved with the circuit in Figure 5. When
using any value other than shorts and opens for R1 and R2, the
final value of the gain range will depend on external resistors
matching on-chip resistors. Since the internal resistors can vary
by as much as
±
20%, the actual values for a particular gain have
to be determined empirically. Note that the two channels within
one part will match quite well; therefore, R1 will track R2 in
Figure 5.
C3 is not required since the common-mode voltage at Pin OUT1
should be identical to the one at Pins +IN2 and –IN2. However,
since only 1 mV of offset at the output of the first DSX will
introduce an offset of 53 mV when the second DSX is set to the
maximum gain of the lowest gain range (34.4 dB), and 263mV
when set to the maximum gain of the highest gain range (48.4 dB),
it is important to include ac coupling to get the maximum dy-
namic range at the output of the cascaded amplifiers. C5 is
necessary if the output signal needs to be referenced to any
common-mode level other than half of the supply as is provided
by Pin OUT2.
Figure 6 shows the gain versus VGN for the circuit in Figure 5
at 1 MHz and the lowest gain range (–14 dB to +34.4 dB). Note
that the gain scaling is 40 dB/V, double the 20 dB/V of an indi-
vidual DSX; this is the result of the parallel connection of the
gain control inputs, VGN1 and VGN2. One could of course
also sequentially increase the gain by first increasing the gain of
Channel 1 and then Channel 2. In that case VGN1 and VGN2
will have to be driven from separate voltage sources, for instance
two separate DACs. Figure 7 shows the gain error of Figure 5.
VGN (V)
G
80
–40
0.1
0.5
2.9
f = 1MHz
THEORETICAL
ACTUAL
0
0.9
1.3
1.7
2.1
2.5
70
20
–10
–20
–30
50
30
60
40
10
Figure 6. Gain vs. VGN for the Circuit in Figure 5
VGN (V)
G
4
3
–4
0.2
0.7
2.7
1.2
1.7
2.2
0
–1
–2
–3
2
1
f = 1MHz
Figure 7. Gain Error vs. VGN for the Circuit in Figure 5
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| AD605ARZ | 功能描述:IC AMP VGA DUAL LN 40MA 16SOIC RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:X-AMP® 標(biāo)準(zhǔn)包裝:2,500 系列:- 放大器類型:通用 電路數(shù):4 輸出類型:- 轉(zhuǎn)換速率:0.6 V/µs 增益帶寬積:1MHz -3db帶寬:- 電流 - 輸入偏壓:45nA 電壓 - 輸入偏移:2000µV 電流 - 電源:1.4mA 電流 - 輸出 / 通道:40mA 電壓 - 電源，單路/雙路(±):3 V ~ 32 V，±1.5 V ~ 16 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR) 其它名稱:LM324ADTBR2G-NDLM324ADTBR2GOSTR |
| AD605ARZ-R7 | 功能描述:IC AMP VGA DUAL LN 40MA 16SOIC RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:X-AMP® 標(biāo)準(zhǔn)包裝:50 系列:- 放大器類型:J-FET 電路數(shù):2 輸出類型:- 轉(zhuǎn)換速率:3.5 V/µs 增益帶寬積:1MHz -3db帶寬:- 電流 - 輸入偏壓:30pA 電壓 - 輸入偏移:2000µV 電流 - 電源:200µA 電流 - 輸出 / 通道:- 電壓 - 電源，單路/雙路(±):7 V ~ 36 V，±3.5 V ~ 18 V 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:8-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:8-PDIP 包裝:管件 |
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| AD605ARZ-RL7 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual, Low Noise, Single-Supply Variable Gain Amplifier |
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