
AD600/AD602 
Figure 51 shows the circuit for the sequential control scheme. 
R6 to R9 with R16 provide offsets of 42.14 dB between the 
individual amplifiers to ensure smooth transitions between the 
gain of each successive X-AMP, with the sequence of gain 
increase being U1A, then U1B, and then U2A. The adjustable 
attenuator provided by R3 + R17 and the 100 Ω input resistance 
of U1A, as well as the fixed 6 dB attenuation provided by R2 
and the input resistance of U1B, are included both to set V
LOG
 to 
Rev. E | Page 24 of 28 
read 0 dB when V
IN
 is 3.16 mV rms and to center the 100 dB 
range between 10 μV rms and 1 V rms input. R5 and C3 
provide a 3 dB noise bandwidth of 30 kHz. R12 to R15 change 
the scaling from 625 mV/decade at the control inputs to 
1 V/decade at the output. At the same time, R12 to R15 center 
the dynamic range at 60 dB, which occurs if the V
G
 of U1B is 
equal to 0. These arrangements ensure that the V
LOG
 still fits 
within the ±6 V supplies. 
R14
7.32k
R15
5.11k
+6V DEC
R13
866
C1HI
A1CM
A1OP
VPOS
VNEG
A2OP
A2CM
C2HI
C1LO
A1HI
A1LO
GAT1
GAT2
A2LO
A2HI
C2LO
+6V
DEC
–6V
DEC
–6V
DEC
NC
NC
NC
NC
NC
NC
C5
22μF
+6V DEC
R11
56.2k
R10
3.16k
U3C
U3A
1/4
AD713
C2
0.1μF
NC = NO CONNECT
R6
3.4k
R8
294
+6V
C1HI
A1CM
A1OP
VPOS
VNEG
A2OP
A2CM
C2HI
C1LO
A1HI
A1LO
GAT1
GAT2
A2LO
A2HI
C2LO
C4
2μF
C1
0.1μF
C3
0.001μF
R4
133k
R5
5.36k
R2
100
R1
133k
C6
4.7μF
+316.2mV
1
2
3
4
5
6
7
14
13
12
11
10
9
8
U4
AD636
VINP
VNEG
CAVG
VLOG
BFOP
BFIN
VPOS
COMM
LDLO
V
RMS
FB
FB
+6V
–6V
+6V
DEC
–6V
DEC
0.1μF
0.1μF
POWER SUPPLY
DECOUPLING
NETWORK
U3B
1/4
AD713
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
REF
A1
A2
+
–
+
–
U2 AD600
V
OUT
+5V
DEC
–5V
DEC
1/4
AD713
V
LOG
R7
1k
R16
287
R9
1k
R17
115
R3
200
0dB
ADJUST
INPUT
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
REF
A1
A2
+
–
+
–
U1 AD600
R12
1k
0
Figure 51. 120 dB Dynamic Range RMS Responding Circuit Optimized for SNR