參數(shù)資料
型號(hào)： AD5764BSU
廠商： ANALOG DEVICES INC
元件分類： DAC
英文描述： Complete, Quad, 16-Bit, High Accuracy, Serial Input, Bipolar Voltage Output DAC
中文描述： SERIAL INPUT LOADING, 8 us SETTLING TIME, 16-BIT DAC, PQFP32
封裝： MO-026-ABA, TQFP-32
文件頁(yè)數(shù)： 19/27頁(yè)
文件大?。?/td> 251K
代理商： AD5764BSU
AD5764
Preliminary Technical Data
Table 6. Input Register Format
R/W
0
REG2
Rev. PrC 21-Oct-04| Page 20 of 28
MSB
LSB
D0
REG1
REG0
A2
A1
A0
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
Table 7. Input Register Bit Functions
R/W
REG2, REG1, REG0
Indicates a read from or a write to the addressed register.
Used in association with the address bits to determine if a read or write operation is to the data register, offset
register, gain register, or function register.
REG2
REG1
REG0
Function
0
0
0
Function Register
0
1
0
Data Register
0
1
1
Coarse Gain Register
1
0
0
Fine Gain Register
1
0
1
Offset Register
These bits are used to decode the DAC channels
A2
A1
A0
Channel Address
0
0
0
DAC A
0
0
1
DAC B
0
1
0
DAC C
0
1
1
DAC D
1
0
0
ALL DACs
Data Bits
FUNCTION REGISTER
The Function Register is addressed by setting the three REG bits to 000. The values written to the address bits and the data bits determine
the function addressed. The Functions available through the function register are shown in Table 8 and Table 9.
A2, A1, A0
D15 – D0
Table 8. Function Register Options
REG2
REG1
0
0
0
0
REG0
0
0
A2
0
0
A1
0
0
A0
0
1
D15 …. D6
D5
D4
D3
D2
D1
D0
NOP, Data = Don’t Care
D1
Direction
Don’t Care
Local-
Ground-
Offset Adjust
D1 Value
D0
Direction
D0
Value
SDO
Disable
0
0
0
0
0
0
1
1
0
0
0
1
CLR, Data = Don’t Care
LOAD, Data = Don’t Care
Table 9. Explanation of Function Register Options
NOP
No operation instruction used in readback operations.
Local-Ground-
Offset Adjust
Cleared by the user to disable local-ground-offset adjust function (default).
D0 / D1
Direction
Cleared by the user to enable D0/D1 as inputs (default). Have weak internal pull-ups.
D0 / D1 Value
I/O port status bits. Logic values written to these locations determine the logic outputs on the D0 and D1 pins when
configured as outputs. These bits indicate the status of the D0 and D1 pins when the I/O port is active as an input. When
enabled as inputs, these bits are don’t cares during a write operation.
SDO Disable
Set by the user to disable the SDO output.
Cleared by the user to enable the SDO output (default).
CLR
Addressing this function resets the DAC outputs to 0 V in twos complement mode and negative full scale in binary
mode.
LOAD
Addressing this function updates the DAC registers and consequently the analog outputs.
Set by the user to enable local-ground-offset adjust function.
Set by the user to enable D0/D1 as outputs.
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