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參數(shù)資料
| 型號(hào)： | AD569JP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | 16-Bit Monotonic Voltage Output D/A Converter |
| 中文描述： | PARALLEL, WORD INPUT LOADING, 4 us SETTLING TIME, 16-BIT DAC, PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁數(shù)： | 1/12頁 |
| 文件大?。?/td> | 468K |
| 代理商： | AD569JP |
FUNCTIONAL BLOCK DIAGRAM
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
16-Bit Monotonic
Voltage Output D/A Converter
AD569
FEATURES
Guaranteed 16-Bit Monotonicity
Monolithic BiMOS II Construction
6
0.01% Typical Nonlinearity
8- and 16-Bit Bus Compatibility
3
m
s Settling to 16 Bits
Low Drift
Low Power
Low Noise
APPLICATIONS
Robotics
Closed-Loop Positioning
High-Resolution ADCs
Microprocessor-Based Process Control
MIL-STD-883 Compliant Versions Available
PRODUCT DESCRIPTION
The AD569 is a monolithic 16-bit digital-to-analog converter
(DAC) manufactured in Analog Devices’ BiMOS II process.
BiMOS II allows the fabrication of low power CMOS logic
functions on the same chip as high precision bipolar linear cir-
cuitry. The AD569 chip includes two resistor strings, selector
switches decoding logic, buffer amplifiers, and double-buffered
input latches.
The AD569’s voltage-segmented architecture insures 16-bit
monotonicity over time and temperature. Integral nonlinearity is
maintained at
±
0.01%, while differential nonlinearity is
±
0.0004%. The on-chip, high-speed buffer amplifiers provide a
voltage output settling time of 3
μ
s to within
±
0.001% for a
full-scale step.
The reference input voltage which determines the output range
can be either unipolar or bipolar. Nominal reference range is
±
5 V and separate reference force and sense connections are
provided for high accuracy applications. The AD569 can oper-
ate with an ac reference in multiplying applications.
Data may be loaded into the AD569’s input latches from 8- and
16-bit buses. The double-buffered structure simplifies 8-bit bus
interfacing and allows multiple DACs to be loaded asynchro-
nously and updated simultaneously. Four TTL/LSTTL/5 V
CMOS-compatible signals control the latches:
CS
,
LBE
,
HBE
,
and
LDAC
The AD569 is available in five grades: J and K versions are
specified from 0
°
C to +70
°
C and are packaged in a 28-pin plas-
tic DIP and 28-pin PLCC package; AD and BD versions are
specified from –25
°
C to +85
°
C and are packaged in a 28-pin
ceramic DIP. The SD version, also in a 28-pin ceramic DIP, is
specified from –55
°
C to +125
°
C.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
PRODUCT HIGHLIGHTS
1. Monotonicity to 16 bits is insured by the AD569’s voltage-
segmented architecture.
2. The output range is ratiometric to an external reference or ac
signal. Gain error and gain drift of the AD569 are negligible.
3. The AD569’s versatile data input structure allows loading
from 8- and 16-bit buses.
4. The on-chip output buffer amplifier can supply
±
5 V into a
1 k
load, and can drive capacitive loads of up to 1000 pF.
5. Kelvin connections to the reference inputs preserve the gain
and offset accuracy of the transfer function in the presence of
wiring resistances and ground currents.
6. The AD569 is available in versions compliant with MIL-STD-
883. Refer to the Analog Devices Military Products Data-
book or current AD569/883B data sheet for detailed
specifications.
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