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參數(shù)資料
| 型號： | AD568JQ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 8/14頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT HS MONO 35NS 24CDIP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 設(shè)置時間： | 35ns |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 雙 ± |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 24-CDIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 24-CDIP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 1 電流，單極；1 電流，雙極；1 電壓，單極；1 電壓，雙極 |
| 采樣率（每秒）： | * |
AD568
REV. A
–3–
ORDERING GUIDE
Linearity
Voltage
Temperature
Error Max
Gain T.C.
Model
l
Package Option
2
Range C@ 25 C
Max ppm/ C
AD568JQ
24-Lead Cerdip (Q-24)
0 to +70
±1/2
±50
AD568KQ
24-Lead Cerdip (Q-24)
0 to +70
±1/4
±30
AD568SQ
24-Lead Cerdip (Q-24)
–55 to +125
±1/2
±50
NOTES
1For details on grade and package offerings screened in accordance with MIL-STD-883, refer to the Analog Devices
Military Products Databook or current AD568/883B data sheet.
2Q = Cerdip.
Definitions
LINEARITY ERROR (also called INTEGRAL NONLINEAR-
ITY OR INL): Analog Devices defines linearity error as the
maximum deviation of the actual analog output from the ideal
output (a straight line drawn from 0 to FS) for any bit combina-
tion expressed in multiples of 1 LSB. The AD568 is laser
trimmed to 1/4 LSB (0.006% of FS) maximum linearity error at
+25
°C for the K version and 1/2 LSB for the J and S versions.
DIFFERENTIAL LINEARITY ERROR (also called DIFFER-
ENTIAL NONLINEARITY or DNL): DNL is the measure of
the variation in analog value, normalized to full scale, associated
with a 1 LSB change in digital input code. Monotonic behavior
WARNING!
ESD SENSITIVE DEVICE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD568 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
requires that the differential linearity error not exceed 1 LSB in
the negative direction.
MONOTONICITY: A DAC is said to be monotonic if the out-
put either increases or remains constant as the digital input
increases.
UNIPOLAR OFFSET ERROR: The deviation of the analog
output from the ideal (0 V or 0 mA) when the inputs are set to
all 0s is called unipolar offset error.
BIPOLAR OFFSET ERROR: The deviation of the analog out-
put from the ideal (negative half-scale) when the inputs are set
to all 0s is called bipolar offset error.
18
6
7
8
9
10
11
12
1
2
3
4
5
19
20
23
24
13
14
17
2X
4X
MSB
LSB
PNP
CURRENT
SOURCES
1.4V
BAND-
GAP
REF
THRESHOLD
CONTROL
THRESHOLD
COMMON
LADDER
COMMON
PNP
SWITCHES
DIFFUSED R-2R LADDER
(10 - 20
)
THIN-FILM R-2R LADDER
(100 - 200
)
BIPOLAR
CURRENT
GENERATOR
BURIED
ZENER
REFERENCE
21
22
200
ANALOG
COMMON
V
CC
I
OUT
REFERENCE
COMMON
1k
15
16
LOAD RESISTOR
(R
L)
BIPOLAR
OFFSET (I
BPO)
10V SPAN
RESISTOR
10V SPAN
RESISTOR
I
OUT
I
OUT
AD568
V
EE
Figure 1. Functional Block Diagram
ABSOLUTE MAXIMUM RATINGS
1
VCC to REFCOM . . . . . . . . . . . . . . . . . . . . . . . . 0 V to +18 V
VEE to REFCOM . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to –18 V
REFCOM to LCOM . . . . . . . . . . . . . . . . . +100 mV to –10 V
ACOM to LCOM . . . . . . . . . . . . . . . . . . . . . . . . . . .
±100 mV
THCOM to LCOM . . . . . . . . . . . . . . . . . . . . . . . . . .
±500 mV
SPANs to LCOM . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±12 V
IBPO to LCOM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 5 V
IOUT to LCOM . . . . . . . . . . . . . . . . . . . . . . . . . . . –5 V to VTH
Digital Inputs to THCOM . . . . . . . . . . . . . –500 mV to +7.0 V
Voltage Across Span Resistor . . . . . . . . . . . . . . . . . . . . . . 12 V
VTH to THCOM . . . . . . . . . . . . . . . . . . . . . . –0.7 V to +1.4 V
Logic Threshold Control Input Current . . . . . . . . . . . . . 5 mA
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mW
Storage Temperature Range
Q (Cerdip) Package . . . . . . . . . . . . . . . . . –65
°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 175
°C
Thermal Resistance
θ
JA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
°C/W
θ
JC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
°C/W
1Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PIN CONFIGURATION
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD568K | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit Ultrahigh Speed Monolithic D/A Converter |
| AD568KQ | 功能描述:IC DAC 12BIT HS MONO 35NS 24CDIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1,000 系列:- 設(shè)置時間:1µs 位數(shù):8 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:8 電壓電源:雙 ± 功率耗散（最大）:941mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC W 包裝:帶卷 (TR) 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
| AD568S | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit Ultrahigh Speed Monolithic D/A Converter |
| AD568SE/883B | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述: |
| AD568SQ | 功能描述:數(shù)模轉(zhuǎn)換器- DAC IC MONO 12-BIT D/A CONV RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
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