VCC to Power Ground . . . . . . . . . " />
參數(shù)資料
型號: AD565AJD
廠商: Analog Devices Inc
文件頁數(shù): 9/12頁
文件大?。?/td> 0K
描述: IC DAC 12BIT MONO HS 24-CDIP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 15
設(shè)置時間: 250ns
位數(shù): 12
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 345mW
工作溫度: 0°C ~ 70°C
安裝類型: 通孔
封裝/外殼: 24-CDIP(0.600",15.24mm)
供應(yīng)商設(shè)備封裝: 24-CDIP 側(cè)面鍍銅
包裝: 管件
輸出數(shù)目和類型: 1 電流,單極;1 電流,雙極
采樣率(每秒): *
AD565A/AD566A
REV.E
–6–
ABSOLUTE MAXIMUM RATINGS
VCC to Power Ground . . . . . . . . . . . . . . . . . . . . . 0 V to +18 V
VEE to Power Ground (AD565A) . . . . . . . . . . . . 0 V to –18 V
Voltage on DAC Output (Pin 9) . . . . . . . . . . . . –3 V to +12 V
Digital Inputs (Pins 13 to 24) to
Power Ground . . . . . . . . . . . . . . . . . . . . . . –1.0 V to +7.0 V
REF IN to Reference Ground . . . . . . . . . . . . . . . . . . . .
±12 V
Bipolar Offset to Reference Ground . . . . . . . . . . . . . . .
±12 V
10 V Span R to Reference Ground . . . . . . . . . . . . . . . .
±12 V
20 V Span R to Reference Ground . . . . . . . . . . . . . . . .
±24 V
REF OUT (AD565A) . . . . . Indefinite Short to Power Ground
Momentary Short to VCC
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . 1000 mW
GROUNDING RULES
The AD565A and AD566A use separate reference and power
grounds to allow optimum connections for low noise and high
speed performance. These grounds should be tied together at one
point, usually the device power ground. The separate ground
returns minimize current flow in low level signal paths. In this
way, logic return currents are not summed into the same return
path with analog signals.
AD565A ORDERING GUIDE
Max Gain
Linearity
T.C. (ppm
Temperature
Error Max
Package
Model
1
of F.S./
°C)
Range
@ +25
°C
Options
2
AD565AJD
50
0
°C to +70°C
±1/2 LSB
Ceramic (D-24)
AD565AJR
50
0
°C to +70°C
±1/2 LSB
SOIC (RW-28)
AD565AKD
20
0
°C to +70°C
±1/4 LSB
Ceramic (D-24)
AD565ASD
30
–55
°C to +125°C
±1/2 LSB
Ceramic (D-24)
AD565ATD
15
–55
°C to +125°C
±1/4 LSB
Ceramic (D-24)
NOTES
1For details on grade and package offerings screened in accordance with MIL-STD-883, refer to the Analog Devices Military Products Databook or current/883B data sheet.
2D = Ceramic DIP, R = SOIC.
AD566A ORDERING GUIDE
Max Gain
Linearity
T.C. (ppm
Temperature
Error Max
Package
Model
1
of F.S./
°C)
Range
@ +25
°C
Option
2
AD566AJD
10
0
°C to +70°C
±1/2 LSB
Ceramic (D-24
AD566AKD
3
0
°C to +70°C
±1/4 LSB
Ceramic (D-24)
AD566ASD
10
–55
°C to +125°C
±1/2 LSB
Ceramic (D-24)
AD566ATD
3
–55
°C to +125°C
±1/4 LSB
Ceramic (D-24)
NOTES
1For details on grade and package offerings screened in accordance with MIL-STD-883, refer to the Analog Devices Military Products Databook or current/883B data sheet.
2D = Ceramic DIP.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
AD565A/AD566A features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
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