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| 型號(hào)： | AD5552BRZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 1/16頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 14BIT SERIAL IN 14SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 56 |
| 設(shè)置時(shí)間： | 1µs |
| 位數(shù)： | 14 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 6.05mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 14-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 14-SOICN |
| 包裝： | 管件 |
| 輸出數(shù)目和類(lèi)型： | 1 電壓，單極；1 電壓，雙極 |
| 采樣率（每秒）： | 1M |
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2.7 V to 5.5 V, Serial-Input,
Voltage-Output, 14-Bit DACs
AD5551/AD5552
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2000–2010 Analog Devices, Inc. All rights reserved.
FEATURES
Full 14-bit performance
3 V and 5 V single supply operation
Low 0.625 mW power dissipation
1
μs settling time
Unbuffered voltage output capable of driving 60 kΩ
loads directly
SPI/QSPI/MICROWIRE-compatible interface standards
Power-on reset clears DAC output to 0 V (unipolar mode)
5 kV HBM ESD classification
APPLICATIONS
Digital gain and offset adjustment
Automatic test equipment
Data acquisition systems
Industrial process control
GENERAL DESCRIPTION
The AD5551/AD5552 are single, 14-bit, serial-input, voltage-
output DACs that operate from a single 2.7 V to 5.5 V supply.
The DAC output range extends from 0 V to VREF.
These DACs provide 14-bit performance without any adjust-
ments. The DAC output is unbuffered, which reduces power
consumption and offset errors contributed by an output buffer.
With an external op amp, the AD5552 can be operated in
bipolar mode generating a ±VREF output swing. The AD5552
also includes Kelvin sense connections for the reference and
analog ground pins to reduce layout sensitivity. For higher
and AD5544.
The AD5551/AD5552 utilize a versatile 3-wire interface that is
compatible with SPI, QSPI, MICROWIRE, and DSP interface
standards. The AD5551 and AD5552 are available in 8-lead and
14-lead SOIC packages.
FUNCTIONAL BLOCK DIAGRAMS
6
1
2
8
7
14-BIT DAC
14-BIT DATA LATCH
SERIAL INPUT REGISITER
VDD
DGND
DIN
VREF
CS
SCLK
3
4
5
VOUT
AGND
AD5551
CONTROL
LOGIC
019
43
-00
1
Figure 1.
14
12
14-BIT DATA LATCH
SERIAL INPUT REGISITER
VDD
DGND
11
LDAC
8
SCLK
CS 7
DIN 10
2
VREFS 5
VREFF 6
VOUT
1
RFB
13
INV
AD5552
3
AGNDF
4
AGNDS
14-BIT DAC
RFB
RINV
CONTROL
LOGIC
01
94
3-
00
2
Figure 2.
PRODUCT HIGHLIGHTS
1.
Single Supply Operation.
The AD5551 and AD5552 are fully specified and
guaranteed for a single 2.7 V to 5.5 V supply.
2.
Low Power Consumption.
Typically 0.625 mW with a 5 V supply.
3.
3-Wire Serial Interface.
4.
Unbuffered output capable of driving 60 kΩ loads, which
reduces power consumption as there is no internal buffer
to drive.
5.
Power-On Reset Circuitry.
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