參數(shù)資料
型號: AD5539JN
英文描述: Voltage-Feedback Operational Amplifier
中文描述: 電壓反饋運算放大器
文件頁數(shù): 12/16頁
文件大小: 569K
代理商: AD5539JN
REV. A
AD5532B
–12–
TRACK
V
IN
DAC
ACQUISITION
CIRCUIT
V
OUT
1
BUSY
OUTPUT
STAGE
CONTROLLER
THRESHOLD
VOLTAGE
PIN
DRIVER
DEVICE
UNDER
TEST
ONLY ONE CHANNEL SHOWN FOR SIMPLICITY
AD5532B
Figure 9. Typical ATE Circuit Using
TRACK
Input
of the pin driver, the comparator output switches. The
μ
C/
μ
P
then knows what code is required to be input in order to obtain
the desired voltage at the DUT. The
TRACK
input is now
brought high and the part begins to acquire V
IN
. At this stage,
BUSY
goes low until V
IN
has been acquired. The output buffer
is then switched from V
IN
to the output of the DAC.
MODES OF OPERATION
The AD5532B can be used in four different modes of oper-
ation. These modes are set by two mode bits, the first two bits in
the serial word.
OFFSET SEL
A4–A0
CAL
0
0
MSB
MODE BITS
0
TEST BIT
LSB
MODE BIT 1 MODE BIT 2
a. 10-Bit Input Serial Write Word (ISHA Mode)
OFFSET SEL
A4–A0
CAL
1
0
MSB
MODE BITS
0
TEST BIT
LSB
DB13–DB0
b. 24-Bit Input Serial Write Word (DAC Mode)
OFFSET SEL
A4–A0
CAL
0
1
MSB
LSB
MODE BITS
DB13–DB0
0
TEST BIT
10-BIT
SERIAL WORD
WRITTEN TO PART
14-BIT DATA
READ FROM PART AFTER
NEXT FALLING EDGE OF
SYNC
(DB13 = MSB OF DAC WORD)
MSB
LSB
c. Input Serial Interface (Acquire and Readback Mode)
OFFSET SEL
A4–A0
CAL
1
1
MSB
LSB
MODE BITS
DB13–DB0
0
TEST BIT
10-BIT
SERIAL WORD
WRITTEN TO PART
14-BIT DATA
READ FROM PART AFTER
NEXT FALLING EDGE OF
SYNC
(DB13 = MSB OF DAC WORD)
MSB
LSB
d. Input Serial Interface (Readback Mode)
Figure 10. Serial Interface Formats
Table II. Modes of Operation
Mode Bit 1
Mode Bit 2
Operating Mode
0
0
1
1
0
1
0
1
ISHA Mode
DAC Mode
Acquire and Readback
Readback
1. ISHA Mode
In this mode, a channel is addressed and that channel
acquires the voltage on V
IN
. This mode requires a 10-bit
write (see Figure 3) to address the relevant channel (V
OUT
0–
V
OUT
31, offset channel or all channels). MSB is written first.
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